arch/mips/ath79/clock.c

120

ath79_set_clk(ATH79_CLK_DDR, ddr_rate);

arch/mips/ath79/clock.c

140

ath79_set_ff_clk(ATH79_CLK_DDR, "ref", mult, div * ddr_div);

arch/mips/ath79/clock.c

206

ath79_set_ff_clk(ATH79_CLK_DDR, "ref", ninit_mul,

arch/mips/ath79/clock.c

340

ath79_set_clk(ATH79_CLK_DDR, ddr_rate);

arch/mips/ath79/clock.c

39

[ATH79_CLK_DDR] = "ddr",

arch/mips/ath79/clock.c

429

ath79_set_clk(ATH79_CLK_DDR, ddr_rate);

arch/mips/ath79/clock.c

512

ath79_set_clk(ATH79_CLK_DDR, ddr_rate);

arch/mips/ath79/clock.c

614

ath79_set_clk(ATH79_CLK_DDR, ddr_rate);