NV04_PGRAPH_DEBUG_3
*ctx_reg(chan, NV04_PGRAPH_DEBUG_3) = 0xfad4ff31;
nvkm_wr32(device, NV04_PGRAPH_DEBUG_3, 0xf0d4ff31);
NV04_PGRAPH_DEBUG_3
nvkm_wr32(device, NV04_PGRAPH_DEBUG_3, 0x55DE0830 | (1 << 29) | (1 << 31));
nvkm_wr32(device, NV04_PGRAPH_DEBUG_3, 0xF3CE0475); /* 0x4 = auto ctx switch */
nvkm_wr32(device, NV04_PGRAPH_DEBUG_3, 0xf2de0475);
nvkm_wr32(device, NV04_PGRAPH_DEBUG_3, 0xe0de8055);