NV
#define HCR_NV __HCR(NV)
ARM64_CPUID_FIELDS(ID_AA64MMFR2_EL1, NV, NV2)
kvm_has_feat_enum(kvm, ID_AA64MMFR2_EL1, NV, NI)) ||
kvm_has_feat(kvm, ID_AA64MMFR2_EL1, NV, NV2));
NVDEF_TEST(reply.nvdm_header, MCTP, MSG_HEADER, VENDOR_ID, !=, NV) ||
NVDEF(MCTP, MSG_HEADER, VENDOR_ID, NV) |
raw_desc->m0 = cpu_to_le64(SET_VAL(LL, ll) | SET_VAL(NV, nv) |
(!GET_VAL(NV, le64_to_cpu(raw_desc->m0))))
nv = GET_VAL(NV, le64_to_cpu(raw_desc->m0));
if (GET_BIT(NV, le64_to_cpu(raw_desc->m0))) {
PINGROUP(uart5_tx_px4, UARTE, SPI3, NV, RSVD3, 0xd048, 0, Y, -1, -1, 6, 8, -1, 10, 11, 12, N, -1, -1, N),
PINGROUP(soc_gpio22_pq2, RSVD0, NV, RSVD2, RSVD3, 0x0060, 0, Y, -1, -1, 6, 8, -1, 10, 11, 12, N, -1, -1, N, "vddio_cam"),
PINGROUP(soc_gpio29_pq2, RSVD0, NV, RSVD2, RSVD3, 0x0050, 0, Y, 5, 7, 6, 8, -1, 10, 12),
PINGROUP(soc_gpio60_pac7, RSVD0, I2S8, NV, IGPU, 0x18038, 0, Y, -1, 7, 6, 8, -1, 10, 12),
up->curregs[R9] = NV | MIE;
write_zsreg(uap, 9, (ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB) | NV);
write_zsreg(uap, 9, NV); /* Didn't we already do this? */
write_zsreg(uap, 9, NV);
uap->curregs[R9] |= NV | MIE;
up->curregs[R9] = NV;
up->curregs[R9] = NV;
MIE | DLC | NV, /* write 9 */
#define DEVICE_BASE(device) (0?NV##_##device)
#define DEVICE_SIZE(device) ((1?NV##_##device) - DEVICE_BASE(device)+1)