NUM_OF_DEC_PER_DCORE
dcore_id = core_id / NUM_OF_DEC_PER_DCORE;
dec_id = core_id % NUM_OF_DEC_PER_DCORE;
for (dec_id = 0 ; dec_id < NUM_OF_DEC_PER_DCORE ; dec_id++) {
dec_bit = dcore_id * NUM_OF_DEC_PER_DCORE + dec_id;
for (dec_id = 0 ; dec_id < NUM_OF_DEC_PER_DCORE ; dec_id++) {
for (dec_id = 0 ; dec_id < NUM_OF_DEC_PER_DCORE ; dec_id++) {
dec_bit = dcore_id * NUM_OF_DEC_PER_DCORE + dec_id;
for (j = 0 ; j < NUM_OF_DEC_PER_DCORE ; j++) {
dec_enabled_bit = 1 << (i * NUM_OF_DEC_PER_DCORE + j);
for (i = 0 ; i < NUM_OF_DEC_PER_DCORE ; i++) {
for (vdec_id = 0 ; vdec_id < NUM_OF_DEC_PER_DCORE ; vdec_id++) {
if (prop->decoder_enabled_mask & BIT(dcore_id * NUM_OF_DEC_PER_DCORE + vdec_id))
if (prop->decoder_enabled_mask & BIT(NUM_OF_DCORES * NUM_OF_DEC_PER_DCORE + 0))
if (prop->decoder_enabled_mask & BIT(NUM_OF_DCORES * NUM_OF_DEC_PER_DCORE + 1))
return (((module_idx / NUM_OF_DEC_PER_DCORE) * ENGINE_ID_DCORE_OFFSET) +
(module_idx % NUM_OF_DEC_PER_DCORE) +
DCORE_OFFSET * (dec_index / NUM_OF_DEC_PER_DCORE) +
DCORE_VDEC_OFFSET * (dec_index % NUM_OF_DEC_PER_DCORE);
#define NUMBER_OF_DEC ((NUM_OF_DEC_PER_DCORE * NUM_OF_DCORES) + NUMBER_OF_PCIE_DEC)