NUM_HW_PIC_BUF
H265_DISPLAY_BUF_SIZE + (H265_NUM_TILE * sizeof(u32)) + (NUM_HW_PIC_BUF *
rpu_enabled * NUM_HW_PIC_BUF * SIZE_DOLBY_RPU_METADATA), DMA_ALIGNMENT);
NUM_HW_PIC_BUF, DMA_ALIGNMENT);
NUM_HW_PIC_BUF * SIZE_SEI_USERDATA +
rpu_enabled * NUM_HW_PIC_BUF * SIZE_DOLBY_RPU_METADATA),
NUM_HW_PIC_BUF * SIZE_SEI_USERDATA,
NUM_HW_PIC_BUF, DMA_ALIGNMENT);
ALIGN(NUM_HW_PIC_BUF * 20 * 22 * 4, DMA_ALIGNMENT) +
#define SIZE_HW_PIC(size_per_buf) (NUM_HW_PIC_BUF * (size_per_buf))
+ NUM_HW_PIC_BUF * SIZE_SEI_USERDATA), HFI_DMA_ALIGNMENT);
* sizeof(u32) + NUM_HW_PIC_BUF * SIZE_SEI_USERDATA), HFI_DMA_ALIGNMENT);
NUM_HW_PIC_BUF;
NUM_HW_PIC_BUF;
ALIGN(NUM_HW_PIC_BUF * 20 * 22 * 4, HFI_DMA_ALIGNMENT) +
#define SIZE_HW_PIC(size_per_buf) (NUM_HW_PIC_BUF * (size_per_buf))