NO_VIRT
p_setd(perm, PCI_ERR_UNCOR_STATUS, NO_VIRT, mask);
p_setd(perm, PCI_ERR_UNCOR_MASK, NO_VIRT, mask);
p_setd(perm, PCI_ERR_UNCOR_SEVER, NO_VIRT, mask);
p_setd(perm, PCI_ERR_COR_STATUS, NO_VIRT, mask);
p_setd(perm, PCI_ERR_COR_MASK, NO_VIRT, mask);
p_setd(perm, PCI_ERR_CAP, NO_VIRT, mask);
p_setb(perm, PCI_PWR_DATA, NO_VIRT, (u8)ALL_WRITE);
p_setd(perm, PCI_MSI_MASK_64, NO_VIRT, ALL_WRITE);
p_setd(perm, PCI_MSI_PENDING_64, NO_VIRT, ALL_WRITE);
p_setd(perm, PCI_MSI_MASK_32, NO_VIRT, ALL_WRITE);
p_setd(perm, PCI_MSI_PENDING_32, NO_VIRT, ALL_WRITE);
p_setb(perm, PCI_CACHE_LINE_SIZE, NO_VIRT, (u8)ALL_WRITE);
p_setb(perm, PCI_LATENCY_TIMER, NO_VIRT, (u8)ALL_WRITE);
p_setb(perm, PCI_BIST, NO_VIRT, (u8)ALL_WRITE);
p_setw(perm, PCI_X_CMD, NO_VIRT, (u16)ALL_WRITE);
p_setd(perm, PCI_X_ECC_CSR, NO_VIRT, ALL_WRITE);
p_setw(perm, PCI_EXP_DEVCTL2, NO_VIRT, ~PCI_EXP_DEVCTL2_ARI);