drivers/gpio/gpio-mxs.c

108

writel(pin_mask, pin_addr + MXS_SET);

drivers/gpio/gpio-mxs.c

109

writel(pin_mask, port->base + PINCTRL_IRQEN(port) + MXS_SET);

drivers/gpio/gpio-mxs.c

112

writel(pin_mask, port->base + PINCTRL_PIN2IRQ(port) + MXS_SET);

drivers/gpio/gpio-mxs.c

118

writel(pin_mask, pin_addr + MXS_SET);

drivers/gpio/gpio-mxs.c

141

writel(bit, pin_addr + MXS_SET);

drivers/gpio/gpio-mxs.c

209

ct->regs.enable = PINCTRL_PIN2IRQ(port) + MXS_SET;

drivers/gpio/gpio-mxs.c

221

ct->regs.enable = PINCTRL_IRQEN(port) + MXS_SET;

drivers/gpio/gpio-mxs.c

328

.set = port->base + PINCTRL_DOUT(port) + MXS_SET,