NAU8540_REG_PWR
{NAU8540_REG_PWR, 0x0000},
case NAU8540_REG_ANALOG_ADC1 ... NAU8540_REG_PWR:
case NAU8540_REG_ANALOG_ADC1 ... NAU8540_REG_PWR:
SND_SOC_DAPM_PGA_S("Frontend PGA1", 0, NAU8540_REG_PWR, 12, 0,
SND_SOC_DAPM_PGA_S("Frontend PGA2", 0, NAU8540_REG_PWR, 13, 0,
SND_SOC_DAPM_PGA_S("Frontend PGA3", 0, NAU8540_REG_PWR, 14, 0,
SND_SOC_DAPM_PGA_S("Frontend PGA4", 0, NAU8540_REG_PWR, 15, 0,
#define NAU8540_REG_MAX NAU8540_REG_PWR