drivers/clk/pxa/clk-pxa25x.c

36

#define PXA25x_CCCR(N2, M, L) (N2 << 7 | M << 5 | L)

drivers/clk/pxa/clk-pxa27x.c

51

#define PXA27x_CCCR(A, L, N2) (A << 25 | N2 << 7 | L)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

166

pv->N1, pv->N2, pv->M1, pv->M2, pv->log2P);

drivers/gpu/drm/nouveau/dispnv04/hw.c

141

pllvals->N2 = pllvals->M2 = 1;

drivers/gpu/drm/nouveau/dispnv04/hw.c

156

pllvals->N2 = ((pll1 >> 21) & 0x18) |

drivers/gpu/drm/nouveau/dispnv04/hw.c

211

return pv->N1 * pv->N2 * pv->refclk / (pv->M1 * pv->M2) >> pv->log2P;

drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/pll.h

11

uint8_t M1, N1, M2, N2;

drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/pll.h

9

uint8_t N1, M1, N2, M2;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c

35

int N1, M1, N2, M2, P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c

36

int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c

41

pv->N2 = N2;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

125

int *N1, int *M1, int *N2, int *M2, int *log2P)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

138

ret = nv04_pll_calc(subdev, &pll, khz, N1, M1, N2, M2, log2P);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

151

int N1, M1, N2, M2, log2P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

156

&N1, &M1, &N2, &M2, &log2P);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

160

if (N2 == M2) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

165

clk->npll_coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

61

int N2 = (coef & 0xff000000) >> 24;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

72

khz = khz * N2 / M2;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

166

int N1, N2, M1, M2;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

174

N2 = (coef & 0xff000000) >> 24;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

182

freq = freq * N2 / M2;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pll.h

9

int *N1, int *M1, int *N2, int *M2, int *P);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

151

int M1, N1, M2, N2, log2P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

184

N2 = (clkP * M2 + calcclk1/2) / calcclk1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

185

if (N2 < minN2)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

187

if (N2 > maxN2)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

192

if (N2/M2 < 4 || N2/M2 > 10)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

195

calcclk2 = calcclk1 * N2 / M2;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

213

*pN2 = N2;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

228

int *N1, int *M1, int *N2, int *M2, int *P)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

232

if (!info->vco2.max_freq || !N2) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

234

if (N2) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

235

*N2 = 1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

239

ret = getMNP_double(subdev, info, freq, N1, M1, N2, M2, P);

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

210

bool single_stage = !pv->NM2 || pv->N2 == pv->M2; /* nv41+ only */

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

216

pll1 = (pll1 & 0xfcc7ffff) | (pv->N2 & 0x18) << 21 |

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

217

(pv->N2 & 0x7) << 19 | 8 << 4 | (pv->M2 & 7) << 4;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

296

bool single_stage = !pv->NM2 || pv->N2 == pv->M2;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

363

int N1, M1, N2, M2, P;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

370

ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P);

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

377

pv.N2 = N2;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c

41

int N1, M1, N2, M2, P;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c

50

ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P);

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c

62

(M2 << 16) | N2);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

1013

*N2 = cur_N;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

1024

*N2 = cur_N;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

1033

*fN1 = (u16)((((best_err / *N2 * *P2) * (*P1 * *M1)) << 13) / crystal);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

1067

&ram->N2, &ram->M2, &ram->P2);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

134

int N2, M2, P2;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

160

const u32 mcoef = ((--ram->P2 << 28) | (ram->N2 << 8) | ram->M2);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

990

int *N2, int *M2, int *P2)

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c

40

int N1, M1, N2, M2;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c

49

ret = nv04_pll_calc(subdev, &pll, freq, &N1, &M1, &N2, &M2, &log2P);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c

55

if (N2 == M2) {

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c

60

ram->coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c

230

int N1, M1, N2, M2, P;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c

331

&N1, &M1, &N2, &M2, &P);

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c

2000

u16 N1, N2, N3, N4, N5, N6, N;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c

2003

N2 = 1 << ((read_phy_reg(pi, 0x4a5) & (0x7 << 12))

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c

2013

N = 2 * (N1 + N2 + N3 + N4 + 2 * (N5 + N6)) + 80;

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

1542

SIG_EXPR_LIST_DECL_SINGLE(N2, GPIOX5, GPIOX5, SIG_DESC_SET(SCUA4, 5));

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

1543

SIG_EXPR_LIST_DECL_SINGLE(N2, ADC13, ADC13);

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

1544

PIN_DECL_(N2, SIG_EXPR_LIST_PTR(N2, GPIOX5), SIG_EXPR_LIST_PTR(N2, ADC13));

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

1545

FUNC_GROUP_DECL(ADC13, N2);

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

2068

ASPEED_PINCTRL_PIN(N2),

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

2516

ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, N2, N2, SCUA8, 17),

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

2517

ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, N2, N2, SCUA8, 17),

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

2058

ASPEED_PINCTRL_PIN(N2),

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

661

SIG_EXPR_LIST_DECL_SINGLE(N2, SDA6, I2C6, I2C6_DESC);

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

662

PIN_DECL_1(N2, GPIOK3, SDA6);

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

664

FUNC_GROUP_DECL(I2C6, L1, N2);

drivers/tty/n_gsm.c

3308

gsm->n2 = N2;