drivers/gpu/drm/nouveau/dispnv04/crtc.c

166

pv->N1, pv->N2, pv->M1, pv->M2, pv->log2P);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

169

pv->N1, pv->M1, pv->log2P);

drivers/gpu/drm/nouveau/dispnv04/hw.c

211

return pv->N1 * pv->N2 * pv->refclk / (pv->M1 * pv->M2) >> pv->log2P;

drivers/gpu/drm/nouveau/dispnv04/hw.c

272

pv.N1 >= pll_lim.vco1.min_n && pv.N1 <= pll_lim.vco1.max_n &&

drivers/gpu/drm/nouveau/dispnv04/hw.c

280

pv.N1 = pll_lim.vco1.min_n;

drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/pll.h

11

uint8_t M1, N1, M2, N2;

drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/pll.h

9

uint8_t N1, M1, N2, M2;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

57

int N1, M1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

70

N1 = (coef & 0x0000ff00) >> 8;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c

73

clock = ref * N1 / M1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c

35

int N1, M1, N2, M2, P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c

36

int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.c

39

pv->N1 = N1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

125

int *N1, int *M1, int *N2, int *M2, int *log2P)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

138

ret = nv04_pll_calc(subdev, &pll, khz, N1, M1, N2, M2, log2P);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

151

int N1, M1, N2, M2, log2P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

156

&N1, &M1, &N2, &M2, &log2P);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

162

clk->npll_coef = (N1 << 8) | M1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

165

clk->npll_coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

171

&N1, &M1, NULL, NULL, &log2P);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

175

clk->spll = 0xc0000000 | (log2P << 16) | (N1 << 8) | M1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

63

int N1 = (coef & 0x0000ff00) >> 8;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.c

69

khz = ref * N1 / M1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

166

int N1, N2, M1, M2;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

176

N1 = (coef & 0x0000ff00) >> 8;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.c

179

freq = ref * N1 / M1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pll.h

9

int *N1, int *M1, int *N2, int *M2, int *P);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

151

int M1, N1, M2, N2, log2P;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

170

for (N1 = minN1; N1 <= maxN1; N1++) {

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

171

calcclk1 = crystal * N1 / M1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

211

*pN1 = N1;

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

228

int *N1, int *M1, int *N2, int *M2, int *P)

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

233

ret = getMNP_single(subdev, info, freq, N1, M1, P);

drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.c

239

ret = getMNP_double(subdev, info, freq, N1, M1, N2, M2, P);

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

164

if (oldM && pv->M1 && (oldN / oldM < pv->N1 / pv->M1))

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

363

int N1, M1, N2, M2, P;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

370

ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P);

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c

375

pv.N1 = N1;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c

41

int N1, M1, N2, M2, P;

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c

50

ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P);

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c

60

nvkm_mask(device, info.reg + 4, 0x00ff00ff, (M1 << 16) | N1);

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c

69

nvkm_wr32(device, info.reg + 4, (N1 << 8) | M1);

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c

73

nvkm_wr32(device, info.reg + 4, (N1 << 8) | M1);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c

143

int N1, M1, P;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c

216

&N1, NULL, &M1, &P);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c

225

ram_wr32(fuc, 0x10fe24, (P << 16) | (N1 << 8) | M1);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c

231

&N1, NULL, &M1, &P);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c

238

ram_wr32(fuc, 0x132004, (P << 16) | (N1 << 8) | M1);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

1014

*N1 = n_ref;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

1025

*N1 = n_ref;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

1037

return gk104_calc_pll_output(*fN1, 1, *N1, *P1, crystal);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

1066

&ram->N1, &ram->fN1, &ram->M1, &ram->P1,

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

1077

ret = gt215_pll_calc(subdev, &fuc->refpll, refclk, &ram->N1,

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

133

int N1, fN1, M1, P1;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

161

const u32 rcoef = (( ram->P1 << 16) | (ram->N1 << 8) | ram->M1);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

703

const u32 rcoef = (( ram->P1 << 16) | (ram->N1 << 8) | ram->M1);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c

989

int *N1, int *fN1, int *M1, int *P1,

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c

40

int N1, M1, N2, M2;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c

49

ret = nv04_pll_calc(subdev, &pll, freq, &N1, &M1, &N2, &M2, &log2P);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c

57

ram->coef = (N1 << 8) | M1;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.c

60

ram->coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c

230

int N1, M1, N2, M2, P;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c

331

&N1, &M1, &N2, &M2, &P);

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c

355

ram_mask(hwsq, 0x00400c, 0x0000ffff, (N1 << 8) | M1);

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c

2000

u16 N1, N2, N3, N4, N5, N6, N;

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c

2001

N1 = ((read_phy_reg(pi, 0x4a5) & (0xff << 0))

drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c

2013

N = 2 * (N1 + N2 + N3 + N4 + 2 * (N5 + N6)) + 80;

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

1548

SIG_EXPR_LIST_DECL_SINGLE(N1, GPIOX6, GPIOX6, SIG_DESC_SET(SCUA4, 6));

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

1549

SIG_EXPR_LIST_DECL_SINGLE(N1, ADC14, ADC14);

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

1550

PIN_DECL_(N1, SIG_EXPR_LIST_PTR(N1, GPIOX6), SIG_EXPR_LIST_PTR(N1, ADC14));

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

1551

FUNC_GROUP_DECL(ADC14, N1);

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

2065

ASPEED_PINCTRL_PIN(N1),

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

2518

ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, N1, N1, SCUA8, 18),

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

2519

ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, N1, N1, SCUA8, 18),

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

2055

ASPEED_PINCTRL_PIN(N1),

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

669

SIG_EXPR_LIST_DECL_SINGLE(N1, SCL7, I2C7, I2C7_DESC);

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

670

PIN_DECL_1(N1, GPIOK4, SCL7);

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

676

FUNC_GROUP_DECL(I2C7, N1, P1);