arch/arm/mach-omap2/opp2420_data.c

100

MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_100MHz,

arch/arm/mach-omap2/opp2420_data.c

107

MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_133MHz,

arch/arm/mach-omap2/opp2420_data.c

113

MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_133MHz,

arch/arm/mach-omap2/opp2420_data.c

120

MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_BYPASS,

arch/arm/mach-omap2/opp2420_data.c

127

MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_BYPASS,

arch/arm/mach-omap2/opp2420_data.c

61

MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_165MHz,

arch/arm/mach-omap2/opp2420_data.c

68

MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_100MHz,

arch/arm/mach-omap2/opp2420_data.c

74

MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_100MHz,

arch/arm/mach-omap2/opp2420_data.c

81

MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_133MHz,

arch/arm/mach-omap2/opp2420_data.c

87

MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_133MHz,

arch/arm/mach-omap2/opp2420_data.c

94

MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_100MHz,

arch/arm/mach-omap2/opp2430_data.c

123

MX_CLKSEL2_PLL_2x_VAL, RB_CM_CLKSEL_MDM_VAL,

arch/arm/mach-omap2/opp2430_data.c

131

MX_CLKSEL2_PLL_2x_VAL, RB_CM_CLKSEL_MDM_VAL,

arch/arm/mach-omap2/opp2430_data.c

59

MX_CLKSEL2_PLL_2x_VAL, R2_CM_CLKSEL_MDM_VAL,

arch/arm/mach-omap2/opp2430_data.c

67

MX_CLKSEL2_PLL_2x_VAL, R1_CM_CLKSEL_MDM_VAL,

arch/arm/mach-omap2/opp2430_data.c

75

MX_CLKSEL2_PLL_2x_VAL, R1_CM_CLKSEL_MDM_VAL,

arch/arm/mach-omap2/opp2430_data.c

83

MX_CLKSEL2_PLL_2x_VAL, R1_CM_CLKSEL_MDM_VAL,