MXR_INT_CLEAR_VSYNC
MXR_INT_CLEAR_VSYNC);
val |= MXR_INT_CLEAR_VSYNC;
mixer_reg_writemask(mixer_ctx, MXR_INT_STATUS, ~0, MXR_INT_CLEAR_VSYNC);
mixer_reg_writemask(mixer_ctx, MXR_INT_STATUS, ~0, MXR_INT_CLEAR_VSYNC);