MXC_ISI_DEBUG_REG
MXC_ISI_DEBUG_REG(CHNL_CTRL),
MXC_ISI_DEBUG_REG(CHNL_IMG_CTRL),
MXC_ISI_DEBUG_REG(CHNL_OUT_BUF_CTRL),
MXC_ISI_DEBUG_REG(CHNL_IMG_CFG),
MXC_ISI_DEBUG_REG(CHNL_IER),
MXC_ISI_DEBUG_REG(CHNL_STS),
MXC_ISI_DEBUG_REG(CHNL_SCALE_FACTOR),
MXC_ISI_DEBUG_REG(CHNL_SCALE_OFFSET),
MXC_ISI_DEBUG_REG(CHNL_CROP_ULC),
MXC_ISI_DEBUG_REG(CHNL_CROP_LRC),
MXC_ISI_DEBUG_REG(CHNL_CSC_COEFF0),
MXC_ISI_DEBUG_REG(CHNL_CSC_COEFF1),
MXC_ISI_DEBUG_REG(CHNL_CSC_COEFF2),
MXC_ISI_DEBUG_REG(CHNL_CSC_COEFF3),
MXC_ISI_DEBUG_REG(CHNL_CSC_COEFF4),
MXC_ISI_DEBUG_REG(CHNL_CSC_COEFF5),
MXC_ISI_DEBUG_REG(CHNL_ROI_0_ALPHA),
MXC_ISI_DEBUG_REG(CHNL_ROI_0_ULC),
MXC_ISI_DEBUG_REG(CHNL_ROI_0_LRC),
MXC_ISI_DEBUG_REG(CHNL_ROI_1_ALPHA),
MXC_ISI_DEBUG_REG(CHNL_ROI_1_ULC),
MXC_ISI_DEBUG_REG(CHNL_ROI_1_LRC),
MXC_ISI_DEBUG_REG(CHNL_ROI_2_ALPHA),
MXC_ISI_DEBUG_REG(CHNL_ROI_2_ULC),
MXC_ISI_DEBUG_REG(CHNL_ROI_2_LRC),
MXC_ISI_DEBUG_REG(CHNL_ROI_3_ALPHA),
MXC_ISI_DEBUG_REG(CHNL_ROI_3_ULC),
MXC_ISI_DEBUG_REG(CHNL_ROI_3_LRC),
MXC_ISI_DEBUG_REG(CHNL_OUT_BUF1_ADDR_Y),
MXC_ISI_DEBUG_REG(CHNL_OUT_BUF1_ADDR_U),
MXC_ISI_DEBUG_REG(CHNL_OUT_BUF1_ADDR_V),
MXC_ISI_DEBUG_REG(CHNL_OUT_BUF_PITCH),
MXC_ISI_DEBUG_REG(CHNL_IN_BUF_ADDR),
MXC_ISI_DEBUG_REG(CHNL_IN_BUF_PITCH),
MXC_ISI_DEBUG_REG(CHNL_MEM_RD_CTRL),
MXC_ISI_DEBUG_REG(CHNL_OUT_BUF2_ADDR_Y),
MXC_ISI_DEBUG_REG(CHNL_OUT_BUF2_ADDR_U),
MXC_ISI_DEBUG_REG(CHNL_OUT_BUF2_ADDR_V),
MXC_ISI_DEBUG_REG(CHNL_SCL_IMG_CFG),
MXC_ISI_DEBUG_REG(CHNL_FLOW_CTRL),
MXC_ISI_DEBUG_REG(CHNL_Y_BUF1_XTND_ADDR),
MXC_ISI_DEBUG_REG(CHNL_U_BUF1_XTND_ADDR),
MXC_ISI_DEBUG_REG(CHNL_V_BUF1_XTND_ADDR),
MXC_ISI_DEBUG_REG(CHNL_Y_BUF2_XTND_ADDR),
MXC_ISI_DEBUG_REG(CHNL_U_BUF2_XTND_ADDR),
MXC_ISI_DEBUG_REG(CHNL_V_BUF2_XTND_ADDR),
MXC_ISI_DEBUG_REG(CHNL_IN_BUF_XTND_ADDR),