MV78XX0_REGS_PHYS_BASE
.pfn = __phys_to_pfn(MV78XX0_REGS_PHYS_BASE),
#define USB0_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x50000)
#define USB1_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x51000)
#define USB2_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x52000)
#define XOR_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x60900)
#define GE00_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x70000)
#define GE01_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x74000)
#define CRYPTO_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x90000)
#define SATA_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0xa0000)
#define DDR_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x00000)
#define DEV_BUS_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x10000)
#define GE10_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x30000)
#define GE11_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x34000)