MT_MAC_SYS_CTRL
mt76_clear(dev, MT_MAC_SYS_CTRL, 0x3);
mt76_clear(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_RX |
mt76_wr(dev, MT_MAC_SYS_CTRL,
mt76_clear(dev, MT_MAC_SYS_CTRL,
{ MT_MAC_SYS_CTRL, 0x00000000 },
mt76_wr(dev, MT_MAC_SYS_CTRL,
mt76_wr(dev, MT_MAC_SYS_CTRL,
mt76_wr(dev, MT_MAC_SYS_CTRL, 0);
mt76_set(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR);
mt76_wr(dev, MT_MAC_SYS_CTRL,
mt76_set(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_TX);
mt76_clear(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_TX);
mt76_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_TX);
mt76_wr(dev, MT_MAC_SYS_CTRL,
mt76_wr(dev, MT_MAC_SYS_CTRL, 0);
mt76_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_TX);
mt76_wr(dev, MT_MAC_SYS_CTRL,
{ MT_MAC_SYS_CTRL, 0x00000000 },
mt76_wr(dev, MT_MAC_SYS_CTRL, 0);
mt76_wr(dev, MT_MAC_SYS_CTRL,
mt76_clear(dev, MT_MAC_SYS_CTRL,
mt76_clear(dev, MT_MAC_SYS_CTRL,
mt76_clear(dev, MT_MAC_SYS_CTRL,
mt7601u_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_TX);
mt7601u_wr(dev, MT_MAC_SYS_CTRL,
mt76_clear(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_RX |
mt7601u_wr(dev, MT_MAC_SYS_CTRL, (MT_MAC_SYS_CTRL_RESET_CSR |
mt7601u_wr(dev, MT_MAC_SYS_CTRL, 0);
{ MT_MAC_SYS_CTRL, 0x00000000 },
mt76_set(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR);
mt76_clear(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR);
mac_ctrl = mt7601u_rr(dev, MT_MAC_SYS_CTRL);
mt7601u_wr(dev, MT_MAC_SYS_CTRL, mac_ctrl);
old = mt7601u_rr(dev, MT_MAC_SYS_CTRL);
mt7601u_wr(dev, MT_MAC_SYS_CTRL, val);
mt7601u_wr(dev, MT_MAC_SYS_CTRL, old);
mac_ctrl = mt7601u_rr(dev, MT_MAC_SYS_CTRL);
mt7601u_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_RX);
mt7601u_wr(dev, MT_MAC_SYS_CTRL, 0);
mt7601u_wr(dev, MT_MAC_SYS_CTRL, mac_ctrl);
mt7601u_wr(dev, MT_MAC_SYS_CTRL, 0);