MTK_TX
MTK_TX);
t7xx_cldma_hw_irq_en_txrx(&md_ctrl->hw_info, CLDMA_ALL_Q, MTK_TX);
t7xx_cldma_hw_irq_en_eq(&md_ctrl->hw_info, CLDMA_ALL_Q, MTK_TX);
t7xx_cldma_hw_irq_dis_eq(hw_info, CLDMA_ALL_Q, MTK_TX);
t7xx_cldma_hw_irq_dis_txrx(hw_info, CLDMA_ALL_Q, MTK_TX);
t7xx_cldma_hw_stop_all_qs(hw_info, MTK_TX);
t7xx_cldma_hw_stop(hw_info, MTK_TX);
md_cd_queue_struct_init(&md_ctrl->txq[i], md_ctrl, MTK_TX, i);
t7xx_cldma_hw_resume_queue(hw_info, queue->index, MTK_TX);
MTK_TX);
t7xx_cldma_hw_irq_en_eq(hw_info, queue->index, MTK_TX);
t7xx_cldma_hw_irq_en_txrx(hw_info, queue->index, MTK_TX);
if (queue->dir == MTK_TX)
queue->dir = MTK_TX;
t7xx_cldma_hw_irq_dis_eq(hw_info, i, MTK_TX);
t7xx_cldma_hw_irq_dis_txrx(hw_info, i, MTK_TX);
tx_active = t7xx_cldma_hw_queue_status(hw_info, CLDMA_ALL_Q, MTK_TX);
t7xx_cldma_hw_stop_all_qs(hw_info, MTK_TX);
t7xx_cldma_hw_stop(hw_info, MTK_TX);
md_cd_queue_struct_reset(&md_ctrl->txq[i], md_ctrl, MTK_TX, i);
MTK_TX);
if (tx_rx == MTK_TX) {
t7xx_cldma_hw_set_start_addr(hw_info, qno, prev_req->gpd_addr, MTK_TX);
if (!t7xx_cldma_hw_queue_status(hw_info, qno, MTK_TX)) {
t7xx_cldma_hw_resume_queue(hw_info, qno, MTK_TX);
t7xx_cldma_hw_start_queue(hw_info, qno, MTK_TX);
if (!t7xx_cldma_hw_queue_status(&md_ctrl->hw_info, qno, MTK_TX)) {
t7xx_cldma_hw_resume_queue(&md_ctrl->hw_info, qno, MTK_TX);
t7xx_cldma_stop_all_qs(md_ctrl, MTK_TX);
t7xx_cldma_clear_all_qs(md_ctrl, MTK_TX);
port->seq_nums[MTK_TX] = 0;
port->seq_nums[MTK_TX] = 0;
FIELD_PREP(CCCI_H_SEQ_FLD, port->seq_nums[MTK_TX]) | CCCI_H_AST_BIT;
port->seq_nums[MTK_TX]++;