MT2063_REG_FIFF_CTRL
(state->reg[MT2063_REG_FIFF_CTRL] | 0x01);
mt2063_setreg(state, MT2063_REG_FIFF_CTRL, val);
reg[MT2063_REG_FIFF_CTRL] & ~0x01);
mt2063_setreg(state, MT2063_REG_FIFF_CTRL, val);