MT8173_CLK_TOP_PDN_AUD_BUS
clk_disable_unprepare(afe_priv->clocks[MT8173_CLK_TOP_PDN_AUD_BUS]);
[MT8173_CLK_TOP_PDN_AUD_BUS] = "top_pdn_aud_intbus",
clk_disable_unprepare(afe_priv->clocks[MT8173_CLK_TOP_PDN_AUD_BUS]);
ret = clk_prepare_enable(afe_priv->clocks[MT8173_CLK_TOP_PDN_AUD_BUS]);