MT8173_CLK_BCK0
clk_disable_unprepare(afe_priv->clocks[MT8173_CLK_BCK0]);
clk_set_rate(afe_priv->clocks[MT8173_CLK_BCK0], 22579200); /* 22M */
[MT8173_CLK_BCK0] = "bck0",
clk_disable_unprepare(afe_priv->clocks[MT8173_CLK_BCK0]);
ret = clk_prepare_enable(afe_priv->clocks[MT8173_CLK_BCK0]);