MSR_TS_S
#define MSR_TS_MASK (MSR_TS_T | MSR_TS_S) /* Transaction State bits */
#define MSR_TM_SUSPENDED(x) (((x) & MSR_TS_MASK) == MSR_TS_S)
{MSR_TS_S, "S"},
if (val & (MSR_TM | MSR_TS_S | MSR_TS_T)) {
guest_msr |= MSR_TS_S;
srr1 |= MSR_TS_S;
new_msr |= MSR_TS_S;
vcpu->arch.shregs.msr |= MSR_TS_S;
(vcpu->arch.shregs.msr & MSR_TS_S)) {
msr |= MSR_TS_S;
msr = (msr & ~MSR_TS_MASK) | MSR_TS_S;
vcpu->arch.shregs.msr = msr | MSR_TS_S;
new_msr |= MSR_TS_S;
ucp->uc_link->uc_mcontext.gp_regs[PT_MSR] |= MSR_TS_S;
MSR_TS_T | MSR_TS_S;
ucp->uc_mcontext.gp_regs[PT_MSR] |= MSR_TS_S;
MSR_TS_T | MSR_TS_S;
UCONTEXT_MSR(ucp) |= MSR_TS_S;