arch/x86/kernel/cpu/common.c

613

rdmsrq(MSR_IA32_S_CET, msr);

arch/x86/kernel/cpu/common.c

615

wrmsrq(MSR_IA32_S_CET, msr & ~CET_ENDBR_EN);

arch/x86/kernel/cpu/common.c

626

rdmsrq(MSR_IA32_S_CET, msr);

arch/x86/kernel/cpu/common.c

629

wrmsrq(MSR_IA32_S_CET, msr);

arch/x86/kernel/cpu/common.c

653

wrmsrq(MSR_IA32_S_CET, CET_ENDBR_EN);

arch/x86/kernel/cpu/common.c

655

wrmsrq(MSR_IA32_S_CET, 0);

arch/x86/kernel/cpu/common.c

661

wrmsrq(MSR_IA32_S_CET, 0);

arch/x86/kernel/cpu/common.c

672

wrmsrq(MSR_IA32_S_CET, 0);

arch/x86/kvm/emulate.c

1506

const u32 MSR_IA32_X_CET = cpl == 3 ? MSR_IA32_U_CET : MSR_IA32_S_CET;

arch/x86/kvm/emulate.c

5106

(s_cet && ctxt->ops->get_msr(ctxt, MSR_IA32_S_CET, &s_cet)))

arch/x86/kvm/svm/svm.c

2869

case MSR_IA32_S_CET:

arch/x86/kvm/svm/svm.c

3119

case MSR_IA32_S_CET:

arch/x86/kvm/svm/svm.c

849

svm_set_intercept_for_msr(vcpu, MSR_IA32_S_CET, MSR_TYPE_RW, !shstk_enabled);

arch/x86/kvm/vmx/nested.c

831

MSR_IA32_S_CET, MSR_TYPE_RW);

arch/x86/kvm/vmx/vmx.c

2248

case MSR_IA32_S_CET:

arch/x86/kvm/vmx/vmx.c

2575

case MSR_IA32_S_CET:

arch/x86/kvm/vmx/vmx.c

4328

vmx_set_intercept_for_msr(vcpu, MSR_IA32_S_CET, MSR_TYPE_RW, intercept);

arch/x86/kvm/x86.c

10101

rdmsrq(MSR_IA32_S_CET, kvm_host.s_cet);

arch/x86/kvm/x86.c

12336

__kvm_emulate_msr_read(vcpu, MSR_IA32_S_CET, &s_cet))

arch/x86/kvm/x86.c

1880

case MSR_IA32_S_CET:

arch/x86/kvm/x86.c

1962

case MSR_IA32_S_CET:

arch/x86/kvm/x86.c

344

MSR_IA32_U_CET, MSR_IA32_S_CET,

arch/x86/kvm/x86.c

7721

case MSR_IA32_S_CET:

tools/testing/selftests/kvm/x86/msrs_test.c

149

msr->index != MSR_IA32_S_CET)

tools/testing/selftests/kvm/x86/msrs_test.c

387

MSR_TEST2(MSR_IA32_S_CET, CET_SHSTK_EN, CET_RESERVED, SHSTK, IBT),

tools/testing/selftests/kvm/x86/msrs_test.c

388

MSR_TEST2(MSR_IA32_S_CET, CET_ENDBR_EN, CET_RESERVED, IBT, SHSTK),