Symbol: MSR_IA32_CR_PAT
arch/x86/hyperv/hv_crash.c
167
hv_wrmsr(MSR_IA32_CR_PAT, hv_crash_ctxt.pat);
arch/x86/hyperv/hv_crash.c
222
ctxt->pat = __rdmsr(MSR_IA32_CR_PAT);
arch/x86/hyperv/hv_vtl.c
192
input->vp_context.msr_cr_pat = native_rdmsrq(MSR_IA32_CR_PAT);
arch/x86/kvm/svm/sev.c
4648
svm_disable_intercept_for_msr(vcpu, MSR_IA32_CR_PAT, MSR_TYPE_RW);
arch/x86/kvm/svm/svm.c
2933
case MSR_IA32_CR_PAT:
arch/x86/kvm/svm/svm.c
3021
case MSR_IA32_CR_PAT:
arch/x86/kvm/vmx/tdx.c
2166
case MSR_IA32_CR_PAT:
arch/x86/kvm/vmx/vmx.c
2459
case MSR_IA32_CR_PAT:
arch/x86/kvm/vmx/vmx.c
4494
rdmsr(MSR_IA32_CR_PAT, low32, high32);
arch/x86/kvm/x86.c
10094
if (rdmsrq_safe(MSR_IA32_CR_PAT, &host_pat) ||
arch/x86/kvm/x86.c
331
MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
arch/x86/kvm/x86.c
4005
case MSR_IA32_CR_PAT:
arch/x86/kvm/x86.c
4416
case MSR_IA32_CR_PAT:
arch/x86/mm/pat/memtype.c
236
wrmsrq(MSR_IA32_CR_PAT, pat_msr_val);
arch/x86/mm/pat/memtype.c
260
rdmsrq(MSR_IA32_CR_PAT, pat_msr_val);
tools/testing/selftests/kvm/lib/x86/svm.c
118
save->g_pat = rdmsr(MSR_IA32_CR_PAT);
tools/testing/selftests/kvm/lib/x86/vmx.c
273
vmwrite(HOST_IA32_PAT, rdmsr(MSR_IA32_CR_PAT));
tools/testing/selftests/kvm/x86/msrs_test.c
358
MSR_TEST_NON_ZERO(MSR_IA32_CR_PAT, 0x07070707, 0, 0x7040600070406, NONE),
tools/testing/selftests/kvm/x86/svm_nested_pat_test.c
45
GUEST_ASSERT_EQ(rdmsr(MSR_IA32_CR_PAT), expected_pat);
tools/testing/selftests/kvm/x86/svm_nested_pat_test.c
47
GUEST_ASSERT_EQ(rdmsr(MSR_IA32_CR_PAT), expected_pat);
tools/testing/selftests/kvm/x86/svm_nested_pat_test.c
49
wrmsr(MSR_IA32_CR_PAT, L2_PAT_MODIFIED);
tools/testing/selftests/kvm/x86/svm_nested_pat_test.c
52
GUEST_ASSERT_EQ(rdmsr(MSR_IA32_CR_PAT), L2_PAT_MODIFIED);
tools/testing/selftests/kvm/x86/svm_nested_pat_test.c
54
GUEST_ASSERT_EQ(rdmsr(MSR_IA32_CR_PAT), L2_PAT_MODIFIED);
tools/testing/selftests/kvm/x86/svm_nested_pat_test.c
66
wrmsr(MSR_IA32_CR_PAT, L1_PAT_VALUE);
tools/testing/selftests/kvm/x86/svm_nested_pat_test.c
67
GUEST_ASSERT_EQ(rdmsr(MSR_IA32_CR_PAT), L1_PAT_VALUE);
tools/testing/selftests/kvm/x86/svm_nested_pat_test.c
85
GUEST_ASSERT_EQ(rdmsr(MSR_IA32_CR_PAT), L1_PAT_VALUE);
tools/testing/selftests/kvm/x86/svm_nested_pat_test.c
87
GUEST_ASSERT_EQ(rdmsr(MSR_IA32_CR_PAT), L2_PAT_MODIFIED);