AT
OVERLAY 0xffff0000 : NOCROSSREFS AT(__vectors_lma) { \
.stubs ADDR(.vectors) + 0x1000 : AT(__stubs_lma) { \
.text_itcm ITCM_OFFSET : AT(__itcm_start - LOAD_OFFSET) { \
.data_dtcm DTCM_OFFSET : AT(__dtcm_start - LOAD_OFFSET) { \
#define HCR_AT __HCR(AT)
HWCAP_CAP(ID_AA64MMFR2_EL1, AT, IMP, CAP_HWCAP, KERNEL_HWCAP_USCAT),
#define FEAT_LSE2 ID_AA64MMFR2_EL1, AT, IMP
MAX_FEAT(ID_AA64MMFR2_EL1, AT, IMP),
.eh_frame : AT(ADDR(.eh_frame) - LOAD_OFFSET) { \
pi->graphics_level[index].AT = cpu_to_be16((u16)at);
uint16_t AT;
pi->graphics_level[index].AT = cpu_to_be16((u16)at);
uint16_t AT;
value |= AT(at);
HINIC_DMA_ATTR_CLEAR(val, AT) &
HINIC_DMA_ATTR_SET(at, AT) |
HINIC3_DMA_ATTR_ENTRY_SET(HINIC3_PCIE_AT_DISABLE, AT) |
AT(NFP_CPP_ACTION_RW, 0, P64, P64); /* read_be/write_be */
AT(NFP_CPP_ACTION_RW, 1, P64, P64); /* read_le/write_le */
AT(NFP_CPP_ACTION_RW, 2, P64, P64); /* read_swap_be/write_swap_be */
AT(NFP_CPP_ACTION_RW, 3, P64, P64); /* read_swap_le/write_swap_le */
AT(0, 0, 0, P64); /* read_be */
AT(0, 1, 0, P64); /* read_le */
AT(0, 2, 0, P64); /* read_swap_be */
AT(0, 3, 0, P64); /* read_swap_le */
AT(1, 0, P64, 0); /* write_be */
AT(1, 1, P64, 0); /* write_le */
AT(1, 2, P64, 0); /* write_swap_be */
AT(1, 3, P64, 0); /* write_swap_le */
AT(3, 0, 0, P32); /* atomic_read */
AT(3, 2, P32, 0); /* mask_compare_write */
AT(4, 0, P32, 0); /* atomic_write */
AT(4, 2, 0, 0); /* atomic_write_imm */
AT(4, 3, 0, P32); /* swap_imm */
AT(5, 0, P32, 0); /* set */
AT(5, 3, 0, P32); /* test_set_imm */
AT(6, 0, P32, 0); /* clr */
AT(6, 3, 0, P32); /* test_clr_imm */
AT(7, 0, P32, 0); /* add */
AT(7, 3, 0, P32); /* test_add_imm */
AT(8, 0, P32, 0); /* addsat */
AT(8, 3, 0, P32); /* test_subsat_imm */
AT(9, 0, P32, 0); /* sub */
AT(9, 3, 0, P32); /* test_sub_imm */
AT(10, 0, P32, 0); /* subsat */
AT(10, 3, 0, P32); /* test_subsat_imm */
AT(13, 0, 0, P32); /* microq128_get */
AT(13, 1, 0, P32); /* microq128_pop */
AT(13, 2, P32, 0); /* microq128_put */
AT(15, 0, P32, 0); /* xor */
AT(15, 3, 0, P32); /* test_xor_imm */
AT(28, 0, 0, P32); /* read32_be */
AT(28, 1, 0, P32); /* read32_le */
AT(28, 2, 0, P32); /* read32_swap_be */
AT(28, 3, 0, P32); /* read32_swap_le */
AT(31, 0, P32, 0); /* write32_be */
AT(31, 1, P32, 0); /* write32_le */
AT(31, 2, P32, 0); /* write32_swap_be */
AT(31, 3, P32, 0); /* write32_swap_le */
AT(16, 1, 0, P32); /* packet_read_packet_status */
AT(17, 1, 0, P32); /* packet_credit_get */
AT(17, 3, 0, P64); /* packet_add_thread */
AT(18, 2, 0, P64); /* packet_free_and_return_pointer */
AT(18, 3, 0, P64); /* packet_return_pointer */
AT(21, 0, 0, P64); /* pe_dma_to_memory_indirect */
AT(21, 1, 0, P64); /* pe_dma_to_memory_indirect_swap */
AT(21, 2, 0, P64); /* pe_dma_to_memory_indirect_free */
AT(21, 3, 0, P64); /* pe_dma_to_memory_indirect_free_swap */
AT(18, 0, 0, P32); /* read_queue */
AT(18, 1, 0, P32); /* read_queue_ring */
AT(18, 2, P32, 0); /* write_queue */
AT(18, 3, P32, 0); /* write_queue_ring */
AT(20, 2, P32, 0); /* journal */
AT(21, 0, 0, P32); /* get */
AT(21, 1, 0, P32); /* get_eop */
AT(21, 2, 0, P32); /* get_freely */
AT(22, 0, 0, P32); /* pop */
AT(22, 1, 0, P32); /* pop_eop */
AT(22, 2, 0, P32); /* pop_freely */
AT(0, 1, 0, P32); /* read_check_error */
AT(2, 0, 0, P32); /* read_int */
AT(3, 0, P32, 0); /* write_int */
AT(2, 0, 0, P32);
AT(3, 0, P32, 0);
AT(2, 0, P64, 0);
AT(0, 1, 0, P32); /* RingGet */
AT(0, 2, P32, 0); /* Interthread Signal */
AT(1, 1, P32, 0); /* RingPut */
AT(1, 2, P32, 0); /* CTNNWr */
AT(2, 0, 0, P32); /* ReflectRd, signal none */
AT(2, 1, 0, P32); /* ReflectRd, signal self */
AT(2, 2, 0, P32); /* ReflectRd, signal remote */
AT(2, 3, 0, P32); /* ReflectRd, signal both */
AT(3, 0, P32, 0); /* ReflectWr, signal none */
AT(3, 1, P32, 0); /* ReflectWr, signal self */
AT(3, 2, P32, 0); /* ReflectWr, signal remote */
AT(3, 3, P32, 0); /* ReflectWr, signal both */
AT(NFP_CPP_ACTION_RW, 1, P32, P32);
AT(0, 3, P32, 0); /* xor */
AT(2, 0, P32, 0); /* set */
AT(2, 1, P32, 0); /* clr */
AT(4, 0, P32, 0); /* add */
AT(4, 1, P32, 0); /* add64 */
AT(6, 0, P32, 0); /* sub */
AT(6, 1, P32, 0); /* sub64 */
AT(6, 2, P32, 0); /* subsat */
AT(8, 2, P32, 0); /* hash_mask */
AT(8, 3, P32, 0); /* hash_clear */
AT(9, 0, 0, P32); /* ring_get */
AT(9, 1, 0, P32); /* ring_pop */
AT(9, 2, 0, P32); /* ring_get_freely */
AT(9, 3, 0, P32); /* ring_pop_freely */
AT(10, 0, P32, 0); /* ring_put */
AT(10, 2, P32, 0); /* ring_journal */
AT(14, 0, P32, 0); /* reflect_write_sig_local */
AT(15, 1, 0, P32); /* reflect_read_sig_local */
AT(17, 2, P32, 0); /* statisic */
AT(24, 0, 0, P32); /* ring_read */
AT(24, 1, P32, 0); /* ring_write */
AT(25, 0, 0, P32); /* ring_workq_add_thread */
AT(25, 1, P32, 0); /* ring_workq_add_work */
AT(0, 0, 0, pp);
AT(1, 0, pp, 0);
AT(NFP_CPP_ACTION_RW, 0, pp, pp);
AT(0, 0, 0, P64); /* ReadNbiDma */
AT(1, 0, P64, 0); /* WriteNbiDma */
AT(NFP_CPP_ACTION_RW, 0, P64, P64);
AT(0, 0, 0, P32); /* ReadNbiStats */
AT(1, 0, P32, 0); /* WriteNbiStats */
AT(NFP_CPP_ACTION_RW, 0, P32, P32);
AT(0, 0, 0, P64); /* ReadNbiTM */
AT(1, 0, P64, 0); /* WriteNbiTM */
AT(NFP_CPP_ACTION_RW, 0, P64, P64);
AT(0, 0, 0, P64); /* ReadNbiPreclassifier */
AT(1, 0, P64, 0); /* WriteNbiPreclassifier */
AT(NFP_CPP_ACTION_RW, 0, P64, P64);
{ PCI_VDEVICE(AT, 0xc107) },
#define pAT (1+AT) /* post attributes - conditional */
.pc_xdrressize = ST+AT,
.pc_xdrressize = ST+AT,
.pc_xdrressize = ST+AT+1,
#define pAT (1+AT) /* post attributes - conditional */
#define pAT (1+AT) /* post attributes - conditional */
.pc_xdrressize = ST+AT,
.pc_xdrressize = ST+AT,
.pc_xdrressize = ST+AT,
.pc_xdrressize = ST+FH+AT,
.pc_xdrressize = ST+AT+1+NFS_MAXDATA/4,
.pc_xdrressize = ST+AT,
.pc_xdrressize = ST+FH+AT,
.pc_xdrressize = ST+FH+AT,
.data..percpu : AT(ADDR(.data..percpu) - LOAD_OFFSET) { \
.data : AT(ADDR(.data) - LOAD_OFFSET) { \
.init.text : AT(ADDR(.init.text) - LOAD_OFFSET) { \
.init.data : AT(ADDR(.init.data) - LOAD_OFFSET) { \
__kcfi_traps : AT(ADDR(__kcfi_traps) - LOAD_OFFSET) { \
.rodata : AT(ADDR(.rodata) - LOAD_OFFSET) { \
.rodata1 : AT(ADDR(.rodata1) - LOAD_OFFSET) { \
.pci_fixup : AT(ADDR(.pci_fixup) - LOAD_OFFSET) { \
__ksymtab : AT(ADDR(__ksymtab) - LOAD_OFFSET) { \
__ksymtab_gpl : AT(ADDR(__ksymtab_gpl) - LOAD_OFFSET) { \
__kcrctab : AT(ADDR(__kcrctab) - LOAD_OFFSET) { \
__kcrctab_gpl : AT(ADDR(__kcrctab_gpl) - LOAD_OFFSET) { \
__ksymtab_strings : AT(ADDR(__ksymtab_strings) - LOAD_OFFSET) { \
__init_rodata : AT(ADDR(__init_rodata) - LOAD_OFFSET) { \
__param : AT(ADDR(__param) - LOAD_OFFSET) { \
__modver : AT(ADDR(__modver) - LOAD_OFFSET) { \
.head.text : AT(ADDR(.head.text) - LOAD_OFFSET) { \
__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { \
.BTF : AT(ADDR(.BTF) - LOAD_OFFSET) { \
.BTF_ids : AT(ADDR(.BTF_ids) - LOAD_OFFSET) { \
.data..init_task : AT(ADDR(.data..init_task) - LOAD_OFFSET) { \
.sbss : AT(ADDR(.sbss) - LOAD_OFFSET) { \
.bss : AT(ADDR(.bss) - LOAD_OFFSET) { \
__bug_table : AT(ADDR(__bug_table) - LOAD_OFFSET) { \
.orc_header : AT(ADDR(.orc_header) - LOAD_OFFSET) { \
.orc_unwind_ip : AT(ADDR(.orc_unwind_ip) - LOAD_OFFSET) { \
.orc_unwind : AT(ADDR(.orc_unwind) - LOAD_OFFSET) { \
.orc_lookup : AT(ADDR(.orc_lookup) - LOAD_OFFSET) { \
.builtin_fw : AT(ADDR(.builtin_fw) - LOAD_OFFSET) ALIGN(8) { \
.tracedata : AT(ADDR(.tracedata) - LOAD_OFFSET) { \
.printk_index : AT(ADDR(.printk_index) - LOAD_OFFSET) { \
.notes : AT(ADDR(.notes) - LOAD_OFFSET) { \
name : AT(ADDR(name) - LOAD_OFFSET) \
REG_FTR_BITS(FTR_LOWER_SAFE, ID_AA64MMFR2_EL1, AT, 0),