MT2063_REG_VGA_GAIN
if ((state->reg[MT2063_REG_VGA_GAIN] & 0x03) == 0x03) /* if DNC2 is off */
if ((state->reg[MT2063_REG_VGA_GAIN] & 0x03) == 0x03) /* if DNC2 is off */
val = (state->reg[MT2063_REG_VGA_GAIN] & 0xFC) | 0x03; /* Set DNC2GC=3 */
if (state->reg[MT2063_REG_VGA_GAIN] !=
MT2063_REG_VGA_GAIN,
val = (state->reg[MT2063_REG_VGA_GAIN] & 0xFC) | 0x03; /* Set DNC2GC=3 */
if (state->reg[MT2063_REG_VGA_GAIN] !=
MT2063_REG_VGA_GAIN,
val = (state->reg[MT2063_REG_VGA_GAIN] & 0xFC) | (DNC2GC[state->rcvr_mode] & 0x03); /* Set DNC2GC=x */
if (state->reg[MT2063_REG_VGA_GAIN] !=
MT2063_REG_VGA_GAIN,
val = (state->reg[MT2063_REG_VGA_GAIN] & 0xFC) | (DNC2GC[state->rcvr_mode] & 0x03); /* Set DNC2GC=x */
if (state->reg[MT2063_REG_VGA_GAIN] !=
MT2063_REG_VGA_GAIN,