arch/sh/kernel/cpu/sh4a/clock-sh7343.c

142

[MSTP028] = MSTP(&div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT),

arch/sh/kernel/cpu/sh4a/clock-sh7343.c

209

CLKDEV_CON_ID("uram0", &mstp_clks[MSTP028]),

arch/sh/kernel/cpu/sh4a/clock-sh7366.c

145

[MSTP028] = MSTP(&div4_clks[DIV4_SH], MSTPCR0, 28, CLK_ENABLE_ON_INIT),

arch/sh/kernel/cpu/sh4a/clock-sh7366.c

207

CLKDEV_CON_ID("rsmem0", &mstp_clks[MSTP028]),

arch/sh/kernel/cpu/sh4a/clock-sh7785.c

133

CLKDEV_ICK_ID("fck", "sh-sci.4", &mstp_clks[MSTP028]),

arch/sh/kernel/cpu/sh4a/clock-sh7785.c

92

[MSTP028] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 28, 0),

arch/sh/kernel/cpu/sh4a/clock-sh7786.c

140

CLKDEV_ICK_ID("fck", "sh-sci.4", &mstp_clks[MSTP028]),

arch/sh/kernel/cpu/sh4a/clock-sh7786.c

93

[MSTP028] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 28, 0),