arch/sh/kernel/cpu/sh4a/clock-sh7757.c

114

CLKDEV_CON_ID("riic0", &mstp_clks[MSTP000]),

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

115

CLKDEV_CON_ID("riic1", &mstp_clks[MSTP000]),

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

116

CLKDEV_CON_ID("riic2", &mstp_clks[MSTP000]),

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

117

CLKDEV_CON_ID("riic3", &mstp_clks[MSTP000]),

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

118

CLKDEV_CON_ID("riic4", &mstp_clks[MSTP000]),

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

119

CLKDEV_CON_ID("riic5", &mstp_clks[MSTP000]),

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

120

CLKDEV_CON_ID("riic6", &mstp_clks[MSTP000]),

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

121

CLKDEV_CON_ID("riic7", &mstp_clks[MSTP000]),

arch/sh/kernel/cpu/sh4a/clock-sh7757.c

86

[MSTP000] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 0, 0),

arch/sh/kernel/cpu/sh4a/clock-shx3.c

122

CLKDEV_CON_ID("fe0_fck", &mstp_clks[MSTP000]),

arch/sh/kernel/cpu/sh4a/clock-shx3.c

92

[MSTP000] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 0, 0),