MSR_TS_T
#define MSR_TS_MASK (MSR_TS_T | MSR_TS_S) /* Transaction State bits */
#define MSR_TM_TRANSACTIONAL(x) (((x) & MSR_TS_MASK) == MSR_TS_T)
{MSR_TS_T, "T"},
if (val & (MSR_TM | MSR_TS_S | MSR_TS_T)) {
msr = (msr & ~MSR_TS_MASK) | MSR_TS_T;
msr = (msr & ~MSR_TS_MASK) | MSR_TS_T;
msr = (msr & ~MSR_TS_MASK) | MSR_TS_T;
vcpu->arch.shregs.msr = (msr & ~MSR_TS_MASK) | MSR_TS_T;
MSR_TS_T;
MSR_TS_T | MSR_TS_S;
MSR_TS_T;
MSR_TS_T | MSR_TS_S;