arch/powerpc/include/asm/hw_irq.h

108

__mtmsrd(MSR_RI, 1);

arch/powerpc/include/asm/hw_irq.h

110

mtmsr(mfmsr() | MSR_RI);

arch/powerpc/include/asm/hw_irq.h

71

__mtmsrd(MSR_EE | MSR_RI, 1);

arch/powerpc/include/asm/hw_irq.h

83

__mtmsrd(MSR_RI, 1);

arch/powerpc/include/asm/hw_irq.h

97

mtmsr(mfmsr() & ~(MSR_EE | MSR_RI));

arch/powerpc/include/asm/ptrace.h

318

return unlikely(cpu_has_msr_ri() && !(regs->msr & MSR_RI));

arch/powerpc/include/asm/ptrace.h

324

regs_set_return_msr(regs, regs->msr | MSR_RI);

arch/powerpc/include/asm/ptrace.h

330

regs_set_return_msr(regs, regs->msr & ~MSR_RI);

arch/powerpc/include/asm/reg.h

134

#define __MSR (MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_HV)

arch/powerpc/include/asm/reg.h

147

#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR)

arch/powerpc/include/asm/reg_booke.h

38

#define MSR_ (MSR_ME | MSR_RI | MSR_CE)

arch/powerpc/include/asm/reg_booke.h

43

#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_CE)

arch/powerpc/kernel/head_32.h

58

LOAD_REG_IMMEDIATE(r11, MSR_KERNEL & ~MSR_RI) /* re-enable MMU */

arch/powerpc/kernel/mce.c

117

if (handled && (regs->msr & MSR_RI))

arch/powerpc/kernel/process.c

1472

{MSR_RI, "RI"},

arch/powerpc/kernel/rtas.c

750

BUG_ON(!(msr & MSR_RI));

arch/powerpc/kernel/traps.c

402

if (!(regs->msr & MSR_RI))

arch/powerpc/kernel/traps.c

436

regs->msr &= ~MSR_RI;

arch/powerpc/kvm/book3s_emulate.c

302

new_msr &= ~(MSR_RI | MSR_EE);

arch/powerpc/kvm/book3s_emulate.c

303

new_msr |= rs_val & (MSR_RI | MSR_EE);

arch/powerpc/kvm/book3s_hv_p9_entry.c

693

__mtmsrd(msr & ~(MSR_IR|MSR_DR|MSR_RI), 0);

arch/powerpc/kvm/book3s_pr.c

244

smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE;

arch/powerpc/lib/sstep.c

3640

if ((val & MSR_RI) == 0)

arch/powerpc/platforms/pseries/ras.c

496

(MSR_LE|MSR_RI|MSR_DR|MSR_IR|MSR_ME|MSR_PR|