arch/x86/events/intel/lbr.c

1368

x86_pmu.lbr_tos = MSR_LBR_TOS;

arch/x86/events/intel/lbr.c

1382

x86_pmu.lbr_tos = MSR_LBR_TOS;

arch/x86/events/intel/lbr.c

1402

x86_pmu.lbr_tos = MSR_LBR_TOS;

arch/x86/events/intel/lbr.c

1429

x86_pmu.lbr_tos = MSR_LBR_TOS;

arch/x86/events/intel/lbr.c

1445

x86_pmu.lbr_tos = MSR_LBR_TOS;

arch/x86/events/intel/lbr.c

1478

x86_pmu.lbr_tos = MSR_LBR_TOS;

arch/x86/events/intel/lbr.c

1492

x86_pmu.lbr_tos = MSR_LBR_TOS;

arch/x86/events/intel/lbr.c

1510

x86_pmu.lbr_tos = MSR_LBR_TOS;

arch/x86/kvm/vmx/pmu_intel.c

164

ret = (index == MSR_LBR_SELECT) || (index == MSR_LBR_TOS) ||

arch/x86/kvm/vmx/pmu_intel.c

668

vmx_set_intercept_for_msr(vcpu, MSR_LBR_TOS, MSR_TYPE_RW, set);

tools/testing/selftests/kvm/x86/vmx_pmu_caps_test.c

203

vcpu_set_msr(vcpu, MSR_LBR_TOS, 7);

tools/testing/selftests/kvm/x86/vmx_pmu_caps_test.c

207

r = _vcpu_set_msr(vcpu, MSR_LBR_TOS, 7);