arch/x86/include/asm/switch_to.h

64

wrmsrq(MSR_IA32_SYSENTER_CS, thread->sysenter_cs);

arch/x86/kernel/cpu/common.c

2145

wrmsrq(MSR_IA32_SYSENTER_CS, tss->x86_tss.ss1);

arch/x86/kernel/cpu/common.c

2277

wrmsrq_safe(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS);

arch/x86/kernel/cpu/common.c

2283

wrmsrq_safe(MSR_IA32_SYSENTER_CS, (u64)GDT_ENTRY_INVALID_SEG);

arch/x86/kvm/emulate.c

2431

ops->get_msr(ctxt, MSR_IA32_SYSENTER_CS, &msr_data);

arch/x86/kvm/emulate.c

2484

ops->get_msr(ctxt, MSR_IA32_SYSENTER_CS, &msr_data);

arch/x86/kvm/svm/nested.c

204

MSR_IA32_SYSENTER_CS,

arch/x86/kvm/svm/svm.c

2773

case MSR_IA32_SYSENTER_CS:

arch/x86/kvm/svm/svm.c

3009

case MSR_IA32_SYSENTER_CS:

arch/x86/kvm/svm/svm.c

773

svm_disable_intercept_for_msr(vcpu, MSR_IA32_SYSENTER_CS, MSR_TYPE_RW);

arch/x86/kvm/vmx/vmx.c

2162

case MSR_IA32_SYSENTER_CS:

arch/x86/kvm/vmx/vmx.c

2374

case MSR_IA32_SYSENTER_CS:

arch/x86/kvm/vmx/vmx.c

4356

vmx_disable_intercept_for_msr(vcpu, MSR_IA32_SYSENTER_CS, MSR_TYPE_RW);

arch/x86/kvm/vmx/vmx.c

4556

rdmsr(MSR_IA32_SYSENTER_CS, low32, high32);

arch/x86/kvm/x86.c

333

MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,

arch/x86/xen/enlighten_pv.c

1142

case MSR_IA32_SYSENTER_CS:

tools/testing/selftests/kvm/lib/x86/vmx.c

280

vmwrite(HOST_IA32_SYSENTER_CS, rdmsr(MSR_IA32_SYSENTER_CS));

tools/testing/selftests/kvm/x86/msrs_test.c

368

MSR_TEST(MSR_IA32_SYSENTER_CS, 0x1234, 0, NONE),