MSR_IA32_PL3_SSP
rdmsrq(MSR_IA32_PL3_SSP, ssp);
wrmsrq(MSR_IA32_PL3_SSP, addr + size);
rdmsrq(MSR_IA32_PL3_SSP, ssp);
rdmsrq(MSR_IA32_PL3_SSP, ssp);
wrmsrq(MSR_IA32_PL3_SSP, ssp + SS_FRAME_SIZE);
rdmsrq(MSR_IA32_PL3_SSP, ssp);
wrmsrq(MSR_IA32_PL3_SSP, ssp);
wrmsrq(MSR_IA32_PL3_SSP, ssp);
wrmsrq(MSR_IA32_PL3_SSP, ssp);
wrmsrq(MSR_IA32_PL3_SSP, 0);
svm_set_intercept_for_msr(vcpu, MSR_IA32_PL3_SSP, MSR_TYPE_RW, !shstk_enabled);
MSR_IA32_PL3_SSP, MSR_TYPE_RW);
vmx_set_intercept_for_msr(vcpu, MSR_IA32_PL3_SSP, MSR_TYPE_RW, intercept);
MSR_IA32_PL3_SSP, MSR_IA32_INT_SSP_TAB,
case MSR_IA32_PL0_SSP ... MSR_IA32_PL3_SSP:
case MSR_IA32_PL0_SSP ... MSR_IA32_PL3_SSP:
case MSR_IA32_PL0_SSP ... MSR_IA32_PL3_SSP:
case MSR_IA32_PL0_SSP ... MSR_IA32_PL3_SSP:
MSR_TEST_CANONICAL(MSR_IA32_PL3_SSP, SHSTK),
MSR_TEST(MSR_IA32_PL3_SSP, canonical_val, canonical_val | 1, SHSTK),