MSR_IA32_PL0_SSP
#define MSR_IA32_FRED_SSP0 MSR_IA32_PL0_SSP /* Level 0 shadow stack pointer */
svm_set_intercept_for_msr(vcpu, MSR_IA32_PL0_SSP, MSR_TYPE_RW, !shstk_enabled);
MSR_IA32_PL0_SSP, MSR_TYPE_RW);
vmx_set_intercept_for_msr(vcpu, MSR_IA32_PL0_SSP, MSR_TYPE_RW, intercept);
case MSR_IA32_PL0_SSP ... MSR_IA32_INT_SSP_TAB:
case MSR_IA32_PL0_SSP ... MSR_IA32_INT_SSP_TAB:
MSR_IA32_PL0_SSP, MSR_IA32_PL1_SSP, MSR_IA32_PL2_SSP,
case MSR_IA32_PL0_SSP ... MSR_IA32_PL3_SSP:
case MSR_IA32_PL0_SSP ... MSR_IA32_PL3_SSP:
case MSR_IA32_PL0_SSP ... MSR_IA32_PL3_SSP:
case MSR_IA32_PL0_SSP ... MSR_IA32_PL3_SSP:
#define MSR_IA32_FRED_SSP0 MSR_IA32_PL0_SSP /* Level 0 shadow stack pointer */
MSR_TEST_CANONICAL(MSR_IA32_PL0_SSP, SHSTK),
MSR_TEST(MSR_IA32_PL0_SSP, canonical_val, canonical_val | 1, SHSTK),