MSR_IA32_PERF_CAPABILITIES
rdmsrq(MSR_IA32_PERF_CAPABILITIES, hybrid(pmu, intel_cap).capabilities);
rdmsrq(MSR_IA32_PERF_CAPABILITIES, perf_cap.capabilities);
rdmsrq(MSR_IA32_PERF_CAPABILITIES, capabilities);
rdmsrq(MSR_IA32_PERF_CAPABILITIES, host_perf_cap);
case MSR_IA32_PERF_CAPABILITIES:
rdmsrq(MSR_IA32_PERF_CAPABILITIES, host_perf_cap);
case MSR_IA32_PERF_CAPABILITIES:
case MSR_IA32_PERF_CAPABILITIES:
MSR_IA32_PERF_CAPABILITIES,
case MSR_IA32_PERF_CAPABILITIES:
MSR_IA32_PERF_CAPABILITIES,
vcpu_set_msr(*vcpu, MSR_IA32_PERF_CAPABILITIES, perf_capabilities);
rdmsr(MSR_IA32_PERF_CAPABILITIES) & PMU_CAP_FW_WRITES)
rdmsr(MSR_IA32_PERF_CAPABILITIES) & PMU_CAP_FW_WRITES)
TEST_ASSERT_EQ(vcpu_get_msr(vcpu, MSR_IA32_PERF_CAPABILITIES),
vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities);
r = _vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, 0);
r = _vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES,
vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, 0);
vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities);
vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, BIT_ULL(bit));
vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES,
vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities);
r = _vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES,
r = _vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, val.capabilities);
r = _vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, val.capabilities);
vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities);
vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities);
val = vcpu_get_msr(vcpu, MSR_IA32_PERF_CAPABILITIES);
val = vcpu_get_msr(vcpu, MSR_IA32_PERF_CAPABILITIES);
vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, 0);
r = _vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, BIT_ULL(i));
host_cap.capabilities = kvm_get_feature_msr(MSR_IA32_PERF_CAPABILITIES);
uint8_t vector = wrmsr_safe(MSR_IA32_PERF_CAPABILITIES, val);
vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities);