arch/x86/events/amd/core.c

1426

x86_pmu.eventsel = MSR_F15H_PERF_CTL;

arch/x86/include/asm/msr-index.h

823

#define MSR_F15H_PERF_CTL0 MSR_F15H_PERF_CTL

arch/x86/include/asm/msr-index.h

824

#define MSR_F15H_PERF_CTL1 (MSR_F15H_PERF_CTL + 2)

arch/x86/include/asm/msr-index.h

825

#define MSR_F15H_PERF_CTL2 (MSR_F15H_PERF_CTL + 4)

arch/x86/include/asm/msr-index.h

826

#define MSR_F15H_PERF_CTL3 (MSR_F15H_PERF_CTL + 6)

arch/x86/include/asm/msr-index.h

827

#define MSR_F15H_PERF_CTL4 (MSR_F15H_PERF_CTL + 8)

arch/x86/include/asm/msr-index.h

828

#define MSR_F15H_PERF_CTL5 (MSR_F15H_PERF_CTL + 10)

arch/x86/kernel/cpu/perfctr-watchdog.c

84

if (msr >= MSR_F15H_PERF_CTL)

arch/x86/kernel/cpu/perfctr-watchdog.c

85

return (msr - MSR_F15H_PERF_CTL) >> 1;

arch/x86/xen/pmu.c

124

return MSR_F15H_PERF_CTL + (addr - MSR_K7_EVNTSEL0);

arch/x86/xen/pmu.c

138

if ((msr >= MSR_F15H_PERF_CTL &&

arch/x86/xen/pmu.c

78

amd_ctrls_base = MSR_F15H_PERF_CTL;

tools/arch/x86/include/asm/msr-index.h

823

#define MSR_F15H_PERF_CTL0 MSR_F15H_PERF_CTL

tools/arch/x86/include/asm/msr-index.h

824

#define MSR_F15H_PERF_CTL1 (MSR_F15H_PERF_CTL + 2)

tools/arch/x86/include/asm/msr-index.h

825

#define MSR_F15H_PERF_CTL2 (MSR_F15H_PERF_CTL + 4)

tools/arch/x86/include/asm/msr-index.h

826

#define MSR_F15H_PERF_CTL3 (MSR_F15H_PERF_CTL + 6)

tools/arch/x86/include/asm/msr-index.h

827

#define MSR_F15H_PERF_CTL4 (MSR_F15H_PERF_CTL + 8)

tools/arch/x86/include/asm/msr-index.h

828

#define MSR_F15H_PERF_CTL5 (MSR_F15H_PERF_CTL + 10)