drivers/gpu/drm/msm/adreno/a5xx_gpu.h

33

struct drm_gem_object *preempt_bo[MSM_GPU_MAX_RINGS];

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

34

struct drm_gem_object *preempt_counters_bo[MSM_GPU_MAX_RINGS];

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

35

struct a5xx_preempt_record *preempt[MSM_GPU_MAX_RINGS];

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

36

uint64_t preempt_iova[MSM_GPU_MAX_RINGS];

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

37

uint32_t last_seqno[MSM_GPU_MAX_RINGS];

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

70

struct drm_gem_object *preempt_bo[MSM_GPU_MAX_RINGS];

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

71

void *preempt[MSM_GPU_MAX_RINGS];

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

72

uint64_t preempt_iova[MSM_GPU_MAX_RINGS];

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

73

struct drm_gem_object *preempt_smmu_bo[MSM_GPU_MAX_RINGS];

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

74

void *preempt_smmu[MSM_GPU_MAX_RINGS];

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

75

uint64_t preempt_smmu_iova[MSM_GPU_MAX_RINGS];

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

76

uint32_t last_seqno[MSM_GPU_MAX_RINGS];

drivers/gpu/drm/msm/msm_gpu.h

183

struct msm_ringbuffer *rb[MSM_GPU_MAX_RINGS];

drivers/gpu/drm/msm/msm_gpu.h

434

struct drm_sched_entity *entities[NR_SCHED_PRIORITIES * MSM_GPU_MAX_RINGS];

drivers/gpu/drm/msm/msm_gpu.h

576

} ring[MSM_GPU_MAX_RINGS];