MSIOF0_SS2
PINMUX_IPSR_MSEL(IP16_2_0, MSIOF0_SS2, SEL_SOF0_0),
PINMUX_IPSR_MSEL(IP14_31_29, MSIOF0_SS2, SEL_SOF0_0),
PINMUX_IPSR_GPSR(IP9_14_12, MSIOF0_SS2),
PINMUX_IPSR_GPSR(IP14_7_4, MSIOF0_SS2),
#define GPSR5_21 F_(MSIOF0_SS2, IP14_7_4)
#define IP14_7_4 FM(MSIOF0_SS2) FM(TX5_A) FM(MSIOF1_SS2_D) FM(AUDIO_CLKC_A) FM(SSI_WS2_A) F_(0, 0) FM(STP_OPWM_0_D) F_(0, 0) FM(AUDIO_CLKOUT_D) F_(0, 0) FM(SPEEDIN_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP14_7_4, MSIOF0_SS2),
#define GPSR5_21 F_(MSIOF0_SS2, IP14_7_4)
#define IP14_7_4 FM(MSIOF0_SS2) FM(TX5_A) FM(MSIOF1_SS2_D) FM(AUDIO_CLKC_A) FM(SSI_WS2_A) F_(0, 0) FM(STP_OPWM_0_D) F_(0, 0) FM(AUDIO_CLKOUT_D) F_(0, 0) FM(SPEEDIN_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP14_7_4, MSIOF0_SS2),
#define GPSR5_21 F_(MSIOF0_SS2, IP14_7_4)
#define IP14_7_4 FM(MSIOF0_SS2) FM(TX5_A) FM(MSIOF1_SS2_D) FM(AUDIO_CLKC_A) FM(SSI_WS2_A) F_(0, 0) FM(STP_OPWM_0_D) F_(0, 0) FM(AUDIO_CLKOUT_D) F_(0, 0) FM(SPEEDIN_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP7_27_24 FM(SDA2) FM(DU_DB1) FM(TCLK2_A) FM(EX_WAIT0) FM(TX0) FM(MSIOF0_SS2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP7_27_24, MSIOF0_SS2),
#define GPSR2_24 F_(MSIOF0_SS2, IP9_31_28)
#define IP9_31_28 FM(MSIOF0_SS2) FM(DU_DB1) FM(TCLK4) FM(VI0_DATA19) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP9_31_28, MSIOF0_SS2),
PINMUX_IPSR_GPSR(IP13_7_4, MSIOF0_SS2),
#define GPSR5_15 F_(MSIOF0_SS2, IP13_7_4)
#define IP13_7_4 FM(MSIOF0_SS2) FM(HTX2_A) FM(SSI_WS4) FM(HRTS0_N_A) FM(FMIN_C) FM(BPFCLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define IP11_27_24 FM(TX0_A) FM(MSIOF0_SS2) FM(FSO_TOE_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP11_27_24, MSIOF0_SS2),
#define GPSR1_11 F_(MSIOF0_SS2, IP1SR1_15_12)
#define IP1SR1_15_12 FM(MSIOF0_SS2) F_(0, 0) F_(0, 0) F_(0, 0) FM(DU_DR7) FM(A11) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP1SR1_15_12, MSIOF0_SS2),
#define IP2SR0_3_0 FM(MSIOF0_SS2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(TSN2_LINK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define GPSR0_16 F_(MSIOF0_SS2, IP2SR0_3_0)
PINMUX_IPSR_GPSR(IP2SR0_3_0, MSIOF0_SS2),
#define GPSR1_6 F_(MSIOF0_SS2, IP0SR1_27_24)
#define IP0SR1_27_24 FM(MSIOF0_SS2) FM(HTX1_B) FM(TX1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP0SR1_27_24, MSIOF0_SS2),
#define GPSR1_6 F_(MSIOF0_SS2, IP0SR1_27_24)
#define IP0SR1_27_24 FM(MSIOF0_SS2) FM(HTX1_B) FM(TX1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP0SR1_27_24, MSIOF0_SS2),
GPIO_FN(MSIOF0_SS2),