MSIOF0_RXD
PINMUX_IPSR_MSEL(IP16_5_3, MSIOF0_RXD, SEL_SOF0_0),
PINMUX_IPSR_MSEL(IP14_25_23, MSIOF0_RXD, SEL_SOF0_0),
PINMUX_IPSR_GPSR(IP6_3, MSIOF0_RXD),
PINMUX_IPSR_GPSR(IP8_31_29, MSIOF0_RXD),
#define GPSR5_22 FM(MSIOF0_RXD)
PINMUX_SINGLE(MSIOF0_RXD),
#define GPSR5_22 FM(MSIOF0_RXD)
PINMUX_SINGLE(MSIOF0_RXD),
#define GPSR5_22 FM(MSIOF0_RXD)
PINMUX_SINGLE(MSIOF0_RXD),
#define IP7_7_4 FM(SCL0) FM(DU_DR0) FM(TPU0TO0) FM(CLKOUT) F_(0, 0) FM(MSIOF0_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP7_7_4, MSIOF0_RXD),
#define GPSR2_19 F_(MSIOF0_RXD, IP9_11_8)
#define IP9_11_8 FM(MSIOF0_RXD) FM(DU_DR0) F_(0, 0) FM(VI0_DATA14) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP9_11_8, MSIOF0_RXD),
PINMUX_IPSR_GPSR(IP12_23_20, MSIOF0_RXD),
#define GPSR5_11 F_(MSIOF0_RXD, IP12_23_20)
#define IP12_23_20 FM(MSIOF0_RXD) F_(0, 0) FM(SSI_WS78) F_(0, 0) F_(0, 0) FM(TX2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define GPSR4_15 FM(MSIOF0_RXD)
PINMUX_SINGLE(MSIOF0_RXD),
#define GPSR1_6 F_(MSIOF0_RXD, IP0SR1_27_24)
#define IP0SR1_27_24 FM(MSIOF0_RXD) F_(0, 0) F_(0, 0) F_(0, 0) FM(DU_DR2) FM(A6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP0SR1_27_24, MSIOF0_RXD),
#define IP1SR0_19_16 FM(MSIOF0_RXD) FM(HRX3) FM(RX1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP1SR0_19_16, MSIOF0_RXD),
#define GPSR0_12 F_(MSIOF0_RXD, IP1SR0_19_16)
#define IP1SR1_15_12 FM(MSIOF0_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP1SR1_15_12, MSIOF0_RXD),
#define GPSR1_11 F_(MSIOF0_RXD, IP1SR1_15_12)
#define GPSR1_11 F_(MSIOF0_RXD, IP1SR1_15_12)
#define IP1SR1_15_12 FM(MSIOF0_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP1SR1_15_12, MSIOF0_RXD),
GPIO_FN(MSIOF0_RXD),