MPI3MR_INTADMCMD_TIMEOUT
(MPI3MR_INTADMCMD_TIMEOUT * HZ));
(MPI3MR_INTADMCMD_TIMEOUT * HZ));
(MPI3MR_INTADMCMD_TIMEOUT * HZ));
(MPI3MR_INTADMCMD_TIMEOUT * HZ));
(MPI3MR_INTADMCMD_TIMEOUT * HZ));
(MPI3MR_INTADMCMD_TIMEOUT * HZ));
(MPI3MR_INTADMCMD_TIMEOUT * HZ));
(MPI3MR_INTADMCMD_TIMEOUT * HZ));
(MPI3MR_INTADMCMD_TIMEOUT * HZ));
(MPI3MR_INTADMCMD_TIMEOUT * HZ));
(MPI3MR_INTADMCMD_TIMEOUT * HZ));
(MPI3MR_INTADMCMD_TIMEOUT * HZ));
MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) {
MPI3MR_INTADMCMD_TIMEOUT, ioc_status, dev_pg0, pg_sz)) {
MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) {
MPI3MR_INTADMCMD_TIMEOUT, ioc_status, phy_pg0, pg_sz)) {
MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) {
MPI3MR_INTADMCMD_TIMEOUT, ioc_status, phy_pg1, pg_sz)) {
MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) {
MPI3MR_INTADMCMD_TIMEOUT, ioc_status, exp_pg0, pg_sz)) {
MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) {
MPI3MR_INTADMCMD_TIMEOUT, ioc_status, exp_pg1, pg_sz)) {
MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) {
MPI3MR_INTADMCMD_TIMEOUT, ioc_status, encl_pg0, pg_sz)) {
MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, &cfg_hdr, sizeof(cfg_hdr))) {
MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, sas_io_unit_pg0, pg_sz)) {
MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, &cfg_hdr, sizeof(cfg_hdr))) {
MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, sas_io_unit_pg1, pg_sz)) {
MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, &cfg_hdr, sizeof(cfg_hdr))) {
MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, sas_io_unit_pg1, pg_sz)) {
MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, sas_io_unit_pg1, pg_sz)) {
MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, &cfg_hdr, sizeof(cfg_hdr))) {
MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, driver_pg1, pg_sz)) {
MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, &cfg_hdr, sizeof(cfg_hdr))) {
MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, driver_pg2, pg_sz)) {
MPI3MR_INTADMCMD_TIMEOUT);
MPI3MR_INTADMCMD_TIMEOUT);
MPI3MR_INTADMCMD_TIMEOUT);
MPI3MR_INTADMCMD_TIMEOUT);
MPI3MR_INTADMCMD_TIMEOUT, &ioc_status);
&mpi_reply, reply_sz, MPI3MR_INTADMCMD_TIMEOUT, &ioc_status))
&mpi_reply, reply_sz, MPI3MR_INTADMCMD_TIMEOUT, &ioc_status))
&mpi_reply, reply_sz, MPI3MR_INTADMCMD_TIMEOUT, &ioc_status)) {
MPI3MR_INTADMCMD_TIMEOUT, &ioc_status);