arch/mips/include/asm/mips-boards/msc01_pci.h

224

#define MSC01_PCI_ID (MSC01_PCI_REG_BASE + MSC01_PCI_ID_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

225

#define MSC01_PCI_SC2PMBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMBASL_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

226

#define MSC01_PCI_SC2PMMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMSKL_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

227

#define MSC01_PCI_SC2PMMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMAPL_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

228

#define MSC01_PCI_SC2PIOBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOBASL_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

229

#define MSC01_PCI_SC2PIOMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMSKL_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

230

#define MSC01_PCI_SC2PIOMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMAPL_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

231

#define MSC01_PCI_P2SCMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMSKL_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

232

#define MSC01_PCI_P2SCMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMAPL_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

233

#define MSC01_PCI_INTCFG (MSC01_PCI_REG_BASE + MSC01_PCI_INTCFG_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

234

#define MSC01_PCI_INTSTAT (MSC01_PCI_REG_BASE + MSC01_PCI_INTSTAT_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

235

#define MSC01_PCI_CFGADDR (MSC01_PCI_REG_BASE + MSC01_PCI_CFGADDR_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

236

#define MSC01_PCI_CFGDATA (MSC01_PCI_REG_BASE + MSC01_PCI_CFGDATA_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

237

#define MSC01_PCI_IACK (MSC01_PCI_REG_BASE + MSC01_PCI_IACK_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

238

#define MSC01_PCI_HEAD0 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD0_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

239

#define MSC01_PCI_HEAD1 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD1_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

240

#define MSC01_PCI_HEAD2 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD2_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

241

#define MSC01_PCI_HEAD3 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD3_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

242

#define MSC01_PCI_HEAD4 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD4_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

243

#define MSC01_PCI_HEAD5 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD5_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

244

#define MSC01_PCI_HEAD6 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD6_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

245

#define MSC01_PCI_HEAD7 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD7_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

246

#define MSC01_PCI_HEAD8 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD8_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

247

#define MSC01_PCI_HEAD9 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD9_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

248

#define MSC01_PCI_HEAD10 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD10_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

249

#define MSC01_PCI_HEAD11 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

250

#define MSC01_PCI_HEAD12 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

251

#define MSC01_PCI_HEAD13 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

252

#define MSC01_PCI_HEAD14 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

253

#define MSC01_PCI_HEAD15 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

254

#define MSC01_PCI_BAR0 (MSC01_PCI_REG_BASE + MSC01_PCI_BAR0_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

255

#define MSC01_PCI_CFG (MSC01_PCI_REG_BASE + MSC01_PCI_CFG_OFS)

arch/mips/include/asm/mips-boards/msc01_pci.h

256

#define MSC01_PCI_SWAP (MSC01_PCI_REG_BASE + MSC01_PCI_SWAP_OFS)