ASS_CLK_GATE
reg_base + ASS_CLK_GATE, 0, 0, &lock);
reg_base + ASS_CLK_GATE, 2, 0, &lock);
reg_base + ASS_CLK_GATE, 3, 0, &lock);
reg_base + ASS_CLK_GATE, 4, 0, &lock);
reg_base + ASS_CLK_GATE, 5, 0, &lock);
reg_base + ASS_CLK_GATE, 9, 0, &lock);
{ ASS_CLK_GATE, 0 },
reg_base + ASS_CLK_GATE, 6, 0, &lock);
reg_base + ASS_CLK_GATE, 5, 0, &lock);
reg_base + ASS_CLK_GATE, 4, 0, &lock);
reg_base + ASS_CLK_GATE, 3, 0, &lock);
reg_base + ASS_CLK_GATE, 2, 0, &lock);
reg_base + ASS_CLK_GATE, 1, 0, &lock);
reg_base + ASS_CLK_GATE, 0, 0, &lock);
{ASS_CLK_GATE, 0},