arch/arm64/include/asm/cputype.h

22

((mpidr >> MPIDR_LEVEL_SHIFT(level)) & MPIDR_LEVEL_MASK)

arch/arm64/kernel/setup.c

147

mpidr_hash.shift_aff[0] = MPIDR_LEVEL_SHIFT(0) + fs[0];

arch/arm64/kernel/setup.c

148

mpidr_hash.shift_aff[1] = MPIDR_LEVEL_SHIFT(1) + fs[1] - bits[0];

arch/arm64/kernel/setup.c

149

mpidr_hash.shift_aff[2] = MPIDR_LEVEL_SHIFT(2) + fs[2] -

arch/arm64/kernel/setup.c

151

mpidr_hash.shift_aff[3] = MPIDR_LEVEL_SHIFT(3) +

arch/arm64/kvm/sys_regs.c

906

mpidr = (vcpu->vcpu_id & 0x0f) << MPIDR_LEVEL_SHIFT(0);

arch/arm64/kvm/sys_regs.c

907

mpidr |= ((vcpu->vcpu_id >> 4) & 0xff) << MPIDR_LEVEL_SHIFT(1);

arch/arm64/kvm/sys_regs.c

908

mpidr |= ((vcpu->vcpu_id >> 12) & 0xff) << MPIDR_LEVEL_SHIFT(2);

arch/arm64/kvm/vgic/vgic-mmio-v3.c

1051

>> ICC_SGI1R_AFFINITY_## level ##_SHIFT) << MPIDR_LEVEL_SHIFT(level))

arch/arm64/kvm/vgic/vgic.h

35

>> VGIC_AFFINITY_## level ##_SHIFT) << MPIDR_LEVEL_SHIFT(level))

tools/arch/arm64/include/asm/cputype.h

22

((mpidr >> MPIDR_LEVEL_SHIFT(level)) & MPIDR_LEVEL_MASK)