ASRC_STREAM_REG
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART,
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART,
ASRC_STREAM_REG(TEGRA186_ASRC_RX_THRESHOLD, dai->id),
ASRC_STREAM_REG(TEGRA186_ASRC_RX_CIF_CTRL, dai->id));
ASRC_STREAM_REG(TEGRA186_ASRC_TX_THRESHOLD, id),
ASRC_STREAM_REG(TEGRA186_ASRC_TX_CIF_CTRL, id));
ASRC_STREAM_REG(TEGRA186_ASRC_CFG, id),
ASRC_STREAM_REG(TEGRA186_ASRC_CFG, id),
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_COMP, id),
ASRC_STREAM_REG(TEGRA186_ASRC_CFG, id),
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, id),
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, id),
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, id),
{ ASRC_STREAM_REG(TEGRA186_ASRC_CFG, id), \
{ ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, id), \
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART,
{ ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, id), \
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, id),
{ ASRC_STREAM_REG(TEGRA186_ASRC_MUTE_UNMUTE_DURATION, id), \
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART,
{ ASRC_STREAM_REG(TEGRA186_ASRC_RX_CIF_CTRL, id), \
{ ASRC_STREAM_REG(TEGRA186_ASRC_TX_CIF_CTRL, id), \
ASRC_STREAM_REG(TEGRA186_ASRC_SOFT_RESET, id),
ASRC_STREAM_REG(TEGRA186_ASRC_ENABLE, 0),
ASRC_STREAM_REG(TEGRA186_ASRC_ENABLE, 1),
ASRC_STREAM_REG(TEGRA186_ASRC_ENABLE, 2),
ASRC_STREAM_REG(TEGRA186_ASRC_ENABLE, 3),
ASRC_STREAM_REG(TEGRA186_ASRC_ENABLE, 4),
ASRC_STREAM_REG(TEGRA186_ASRC_ENABLE, 5),
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, 0),
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, 1),
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, 2),
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, 3),
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, 4),
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_INT_PART, 5),
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, 0),
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, 1),
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, 2),
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_LOCK_STATUS,
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, 3),
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, 4),
ASRC_STREAM_REG(TEGRA186_ASRC_RATIO_FRAC_PART, 5),
ASRC_STREAM_REG(TEGRA186_ASRC_CFG, 0), 0, 1, 0,
ASRC_STREAM_REG(TEGRA186_ASRC_CFG, 1), 0, 1, 0,
ASRC_STREAM_REG(TEGRA186_ASRC_CFG, 2), 0, 1, 0,
ASRC_STREAM_REG(TEGRA186_ASRC_CFG, 3), 0, 1, 0,
ASRC_STREAM_REG(TEGRA186_ASRC_CFG, 4), 0, 1, 0,
ASRC_STREAM_REG(TEGRA186_ASRC_CFG, 5), 0, 1, 0,
ASRC_STREAM_REG(TEGRA186_ASRC_RX_THRESHOLD, 0), 0, 3, 0,
ASRC_STREAM_REG(TEGRA186_ASRC_RX_THRESHOLD, 1), 0, 3, 0,
ASRC_STREAM_REG(TEGRA186_ASRC_RX_THRESHOLD, 2), 0, 3, 0,
ASRC_STREAM_REG(TEGRA186_ASRC_RX_THRESHOLD, 3), 0, 3, 0,
ASRC_STREAM_REG(TEGRA186_ASRC_RX_THRESHOLD, 4), 0, 3, 0,
ASRC_STREAM_REG(TEGRA186_ASRC_RX_THRESHOLD, 4), 0, 3, 0,
ASRC_STREAM_REG(TEGRA186_ASRC_TX_THRESHOLD, 0), 0, 3, 0,
ASRC_STREAM_REG(TEGRA186_ASRC_TX_THRESHOLD, 1), 0, 3, 0,
ASRC_STREAM_REG(TEGRA186_ASRC_TX_THRESHOLD, 2), 0, 3, 0,
ASRC_STREAM_REG(TEGRA186_ASRC_TX_THRESHOLD, 3), 0, 3, 0,
ASRC_STREAM_REG(TEGRA186_ASRC_TX_THRESHOLD, 4), 0, 3, 0,
ASRC_STREAM_REG(TEGRA186_ASRC_TX_THRESHOLD, 5), 0, 3, 0,