MMU_HOP4
#define MMU_V1_MAX_HOPS (MMU_HOP4 + 1)
for (hop_idx = MMU_HOP0; hop_idx < MMU_HOP4; hop_idx++) {
hop_idx = MMU_HOP4;
if (hop_addr[MMU_HOP4])
hl_mmu_dr_clear_pte(ctx, hop_pte_addr[MMU_HOP4]);
if (hop_addr[MMU_HOP4] && !hl_mmu_dr_put_pte(ctx, hop_addr[MMU_HOP4]))
prop->pmmu.hop_shifts[MMU_HOP4] = MMU_V1_1_HOP4_SHIFT;
prop->pmmu.hop_masks[MMU_HOP4] = MMU_V1_1_HOP4_MASK;
prop->pmmu.hop_shifts[MMU_HOP4] = HOP4_SHIFT_64K;
prop->pmmu.hop_masks[MMU_HOP4] = HOP4_MASK_64K;
prop->pmmu.hop_shifts[MMU_HOP4] = HOP4_SHIFT_4K;
prop->pmmu.hop_masks[MMU_HOP4] = HOP4_MASK_4K;
prop->dmmu.hop_shifts[MMU_HOP4] = MMU_V1_0_HOP4_SHIFT;
prop->dmmu.hop_masks[MMU_HOP4] = MMU_V1_0_HOP4_MASK;