MP1_HWIP
if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 2) &&
if (amdgpu_ip_version(reset_context->reset_req_dev, MP1_HWIP, 0) ==
if ((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 2) &&
adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i]));
[MP1_HWIP] = "MP1",
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
amdgpu_ip_version(adev, MP1_HWIP, 0));
[MP1_HWIP] = MP1_HWID,
adev->ip_versions[MP1_HWIP][0] = IP_VERSION(9, 0, 0);
adev->ip_versions[MP1_HWIP][0] = IP_VERSION(9, 0, 0);
adev->ip_versions[MP1_HWIP][0] = IP_VERSION(10, 0, 1);
adev->ip_versions[MP1_HWIP][0] = IP_VERSION(10, 0, 0);
adev->ip_versions[MP1_HWIP][0] = IP_VERSION(11, 0, 2);
adev->ip_versions[MP1_HWIP][0] = IP_VERSION(11, 0, 2);
adev->ip_versions[MP1_HWIP][0] = IP_VERSION(13, 0, 2);
adev->ip_versions[MP1_HWIP][0] = IP_VERSION(11, 0, 8);
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
(amdgpu_ip_version(adev, MP1_HWIP, 0) ==
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
} else if (block_type == MP1_HWIP) {
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
case MP1_HWIP:
adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i]));
adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i]));
adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i]));
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 7) &&
if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(12, 0, 0) ||
amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(12, 0, 1) ||
amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 6) ||
amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12) ||
amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 14))
if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(10, 0, 0) ||
amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(10, 0, 1))
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i]));
adev->reg_offset[MP1_HWIP][i] = (uint32_t *)(&(MP1_BASE.instance[i]));
uint32_t mp1_ver = amdgpu_ip_version(adev, MP1_HWIP, 0);
uint32_t mp1_ver = amdgpu_ip_version(adev, MP1_HWIP, 0);
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 2)) {
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
if (amdgpu_ip_version(adev, MP1_HWIP, 0) < IP_VERSION(11, 0, 0)) {
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
if ((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 5, 0) ||
amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 5, 2)) &&
amdgpu_ip_version(adev, MP1_HWIP, 0) >= IP_VERSION(13, 0, 0))
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
if ((amdgpu_ip_version(adev, MP1_HWIP, 0) >= IP_VERSION(11, 0, 0)) &&
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
if ((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 1)) ||
(amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 3)))
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 0) ||
amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 5))
if (((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 0)) &&
((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 5)) &&
if (amdgpu_ip_version(adev, MP1_HWIP, 0) ==
if (amdgpu_ip_version(adev, MP1_HWIP, 0) ==
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
if (((amdgpu_ip_version(adev, MP1_HWIP, 0) ==
((amdgpu_ip_version(adev, MP1_HWIP, 0) ==
if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 9))
(amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 0)) &&
(amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 0)) &&
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
if (((amdgpu_ip_version(adev, MP1_HWIP, 0) ==
((amdgpu_ip_version(adev, MP1_HWIP, 0) ==
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 13))
if ((amdgpu_ip_version(adev, MP1_HWIP, 0) ==
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
if (amdgpu_ip_version(adev, MP1_HWIP, 0) !=
if (amdgpu_ip_version(adev, MP1_HWIP, 0) !=
amdgpu_ip_version(smu->adev, MP1_HWIP, 0) != IP_VERSION(11, 0, 7))
if (!((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 7)) &&
if ((amdgpu_ip_version(adev, MP1_HWIP, 0) ==
switch (amdgpu_ip_version(smu->adev, MP1_HWIP, 0)) {
if (((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 7)) &&
((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 11)) &&
if (amdgpu_ip_version(adev, MP1_HWIP, 0) != IP_VERSION(11, 0, 7))
(amdgpu_ip_version(adev, MP1_HWIP, 0) > IP_VERSION(11, 0, 7)) &&
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 13))
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 13))
switch (amdgpu_ip_version(smu->adev, MP1_HWIP, 0)) {
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == \
((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 9)) ||
(amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 7))))
amdgpu_ucode_ip_version_decode(adev, MP1_HWIP, ucode_prefix, sizeof(ucode_prefix));
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
if (amdgpu_ip_version(adev, MP1_HWIP, 0) ==
if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 2)) {
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
amdgpu_ip_version(adev, MP1_HWIP, 0));
u32 ip_version = amdgpu_ip_version(adev, MP1_HWIP, 0);
if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 11) ||
amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 5, 0) ||
amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 5, 2) ||
amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 12) ||
amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 13))
if (((amdgpu_ip_version(adev, MP1_HWIP, 0) ==
((amdgpu_ip_version(adev, MP1_HWIP, 0) ==
amdgpu_ucode_ip_version_decode(adev, MP1_HWIP, ucode_prefix, sizeof(ucode_prefix));
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 2)) {
if ((amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 2)) && (!ret && value))
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) != IP_VERSION(13, 0, 2)) {
if ((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 7)) ||
(amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 0)) ||
(amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 10)))
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
uint32_t mp1_ver = amdgpu_ip_version(smu->adev, MP1_HWIP, 0);
((amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 0) &&
(amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 10) &&
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 10))
if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 10))
if ((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 10)) &&
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) ==
if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 4))
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12) &&
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12))
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) ==
else if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) ==
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12) &&
smu->smu_temp.temp_funcs = (amdgpu_ip_version(smu->adev, MP1_HWIP, 0)
switch (amdgpu_ip_version(smu->adev, MP1_HWIP, 0)) {
message_map = (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12)) ?
smu->feature_map = (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12)) ?
switch (amdgpu_ip_version(smu->adev, MP1_HWIP, 0)) {
(amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12)))
amdgpu_ucode_ip_version_decode(adev, MP1_HWIP, ucode_prefix,
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) ==
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12))
amdgpu_ip_version(smu->adev, MP1_HWIP, 0);
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12) &&
if ((amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 8))
if ((amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 1) ||
(amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 3))
if ((amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 8))
if ((amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 1) ||
(amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 3))
if ((amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 8))
if ((amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 1) ||
(amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 3))
else if (i == 1 && amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 1))
if ((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 2)) ||
(amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 3)))
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
amdgpu_ip_version(adev, MP1_HWIP, 0));
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
amdgpu_ucode_ip_version_decode(adev, MP1_HWIP, ucode_prefix, sizeof(ucode_prefix));
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 1))
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 1))
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 4))
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 4))
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 4))
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 1))
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 1))
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 1))
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 1))
if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 2))
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
amdgpu_ip_version(adev, MP1_HWIP, 0));
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
amdgpu_ucode_ip_version_decode(adev, MP1_HWIP, ucode_prefix, sizeof(ucode_prefix));
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(15, 0, 0))
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
init_config.mp1_ip_version = amdgpu_ip_version(adev, MP1_HWIP, 0);
init_config.psp_ip_version = amdgpu_ip_version(adev, MP1_HWIP, 0);