Symbol: MODULO
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.h
51
DCCG_SRII(MODULO, DTBCLK_DTO, 0),\
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.h
52
DCCG_SRII(MODULO, DTBCLK_DTO, 1),\
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.h
53
DCCG_SRII(MODULO, DTBCLK_DTO, 2),\
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.h
54
DCCG_SRII(MODULO, DTBCLK_DTO, 3),\
drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.h
56
DCCG_SRII(MODULO, DTBCLK_DTO, 0),\
drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.h
57
DCCG_SRII(MODULO, DTBCLK_DTO, 1),\
drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.h
58
DCCG_SRII(MODULO, DTBCLK_DTO, 2),\
drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.h
59
DCCG_SRII(MODULO, DTBCLK_DTO, 3),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
1210
modulo_hz = REG_READ(MODULO[inst]);
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
1298
REG_WRITE(MODULO[inst],
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
1314
REG_WRITE(MODULO[inst], ref_clk);
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
1344
REG_WRITE(MODULO[inst], dp_dto_ref_khz * e->div_factor);
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
1348
REG_WRITE(MODULO[inst], dp_dto_ref_khz * 1000);
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
990
REG_WRITE(MODULO[inst], dp_dto_ref_khz * e->div_factor);
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
994
REG_WRITE(MODULO[inst], dp_dto_ref_khz * 1000);
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
109
SRII(MODULO, DP_DTO, 0),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
110
SRII(MODULO, DP_DTO, 1),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
111
SRII(MODULO, DP_DTO, 2),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
112
SRII(MODULO, DP_DTO, 3),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
124
SRII(MODULO, DP_DTO, 0),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
125
SRII(MODULO, DP_DTO, 1),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
126
SRII(MODULO, DP_DTO, 2),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
127
SRII(MODULO, DP_DTO, 3),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
140
SRII(MODULO, DP_DTO, 0),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
141
SRII(MODULO, DP_DTO, 1),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
142
SRII(MODULO, DP_DTO, 2),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
143
SRII(MODULO, DP_DTO, 3),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
144
SRII(MODULO, DP_DTO, 4),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
155
SRII(MODULO, DP_DTO, 0),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
156
SRII(MODULO, DP_DTO, 1),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
180
SRII(MODULO, DP_DTO, 0),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
181
SRII(MODULO, DP_DTO, 1),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
182
SRII(MODULO, DP_DTO, 2),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
183
SRII(MODULO, DP_DTO, 3),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
229
uint32_t MODULO[MAX_PIPES];
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
66
SRII(MODULO, DP_DTO, 0),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
67
SRII(MODULO, DP_DTO, 1),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
68
SRII(MODULO, DP_DTO, 2),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
69
SRII(MODULO, DP_DTO, 3),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
70
SRII(MODULO, DP_DTO, 4),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
71
SRII(MODULO, DP_DTO, 5),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
83
SRII(MODULO, DP_DTO, 0),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
84
SRII(MODULO, DP_DTO, 1),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
94
SRII(MODULO, DP_DTO, 0),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
95
SRII(MODULO, DP_DTO, 1),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
96
SRII(MODULO, DP_DTO, 2),\
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
97
SRII(MODULO, DP_DTO, 3),\
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
1251
DCCG_SRII(MODULO, DTBCLK_DTO, 0), DCCG_SRII(MODULO, DTBCLK_DTO, 1), \
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
1252
DCCG_SRII(MODULO, DTBCLK_DTO, 2), DCCG_SRII(MODULO, DTBCLK_DTO, 3), \
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
204
SRII_ARR_2(MODULO, DP_DTO, 0, index), \
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
205
SRII_ARR_2(MODULO, DP_DTO, 1, index), \
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
206
SRII_ARR_2(MODULO, DP_DTO, 2, index), \
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
207
SRII_ARR_2(MODULO, DP_DTO, 3, index), \
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
639
DCCG_SRII(MODULO, DP_DTO, 0), DCCG_SRII(MODULO, DP_DTO, 1), \
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
640
DCCG_SRII(MODULO, DP_DTO, 2), DCCG_SRII(MODULO, DP_DTO, 3), \
drivers/net/ethernet/emulex/benet/be.h
142
*index = MODULO((*index + val), limit);
drivers/net/ethernet/emulex/benet/be.h
147
*index = MODULO((*index + 1), limit);
drivers/net/ethernet/emulex/benet/be.h
172
*index = MODULO((*index - 1), limit);
drivers/net/ethernet/emulex/benet/be_main.c
5491
MODULO(adapter->work_counter, adapter->be_get_temp_freq) == 0)
drivers/scsi/be2iscsi/be.h
48
*index = MODULO((*index + 1), limit);