MODE_MASK
tst \reg, #MODE_MASK
bic \reg , \reg , #MODE_MASK
PSR_T_BIT | MODE_MASK)
((regs)->ARM_cpsr & MODE_MASK)
unsigned long mode = regs->ARM_cpsr & MODE_MASK;
.cpsr_mask = MODE_MASK | PSR_T_BIT,
return ((__boot_cpu_mode & MODE_MASK) == HYP_MODE &&
.cpsr_mask = PSR_T_BIT | MODE_MASK,
.cpsr_mask = PSR_T_BIT | MODE_MASK,
.cpsr_mask = PSR_T_BIT | MODE_MASK,
.cpsr_mask = PSR_T_BIT | MODE_MASK,
__boot_cpu_mode & MODE_MASK);
cpsr = (cpsr & ~MODE_MASK) | USR_MODE;
.cpsr_mask = MODE_MASK | PSR_T_BIT | PSR_J_BIT,
.cpsr_mask = MODE_MASK,
else if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
.cpsr_mask = MODE_MASK,
.cpsr_mask = MODE_MASK,
.cpsr_mask = MODE_MASK,
.cpsr_mask = (PSR_T_BIT | MODE_MASK),
.cpsr_mask = (PSR_T_BIT | MODE_MASK),
.cpsr_mask = MODE_MASK,
if ((*cpsr & MODE_MASK) == HYP_MODE)
((cpsr & MODE_MASK) == HYP_MODE) ? "HYP" : "SVC",