MMC_CMD
omap_cfg_reg(MMC_CMD);
writel(cmd->opcode, host->base + MMC_CMD);
MMC_PFC_CTRL(mmc_ctrl, MMC_CLK, MMC_CMD);
PINMUX_IPSR_GPSR(IP2_5_3, MMC_CMD),
PINMUX_IPSR_GPSR(IP14_3, MMC_CMD),
PINMUX_IPSR_GPSR(IP0_11, MMC_CMD),
#define IP5_23_20 FM(VI1_DATA1) FM(MSIOF1_SS2) F_(0, 0) FM(D4) FM(MMC_CMD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP5_23_20, MMC_CMD),
#define IP5_31_28 FM(VI1_DATA3) FM(CANFD0_RX_B) F_(0, 0) FM(D6) FM(MMC_CMD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP5_31_28, MMC_CMD),
#define IP8_27_24 FM(NFRE_N) FM(MMC_CMD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP8_27_24, MMC_CMD),
GPIO_FN(MMC_CMD),
GPIO_FN(MMC_CMD),