MLX5_OPCODE_UMR

158

case MLX5_OPCODE_UMR:

274

MLX5_FENCE_MODE_INITIATOR_SMALL, MLX5_OPCODE_UMR);

22

[IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR,

23

[IB_WR_REG_MR] = MLX5_OPCODE_UMR,

26

[MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR,

880

wr->wr_id, nreq, fence, MLX5_OPCODE_UMR);

912

nreq, fence, MLX5_OPCODE_UMR);

129

cpu_to_be32((icosq->pc << MLX5_WQE_CTRL_WQE_INDEX_SHIFT) | MLX5_OPCODE_UMR);

88

cseg->opmod_idx_opcode = cpu_to_be32((pc << 8) | MLX5_OPCODE_UMR | (opmod << 24));

690

MLX5_OPCODE_UMR);