Symbol: MLX5_CAP_GEN
drivers/fwctl/mlx5/main.c
142
if (MLX5_CAP_GEN(mcdev->mdev, uctx_cap) &
drivers/infiniband/hw/mlx5/cmd.c
15
is_terminate = MLX5_CAP_GEN(dev->mdev, terminate_scatter_list_mkey);
drivers/infiniband/hw/mlx5/cmd.c
16
is_dump = MLX5_CAP_GEN(dev->mdev, dump_fill_mkey);
drivers/infiniband/hw/mlx5/cmd.c
17
is_null = MLX5_CAP_GEN(dev->mdev, null_mkey);
drivers/infiniband/hw/mlx5/cmd.c
259
MLX5_SET(query_vuid_in, in, vhca_id, MLX5_CAP_GEN(dev, vhca_id));
drivers/infiniband/hw/mlx5/cong.c
448
if (!MLX5_CAP_GEN(mdev, cc_query_allowed) ||
drivers/infiniband/hw/mlx5/cong.c
449
!MLX5_CAP_GEN(mdev, cc_modify_allowed))
drivers/infiniband/hw/mlx5/cong.c
463
if (!MLX5_CAP_GEN(mdev, roce) ||
drivers/infiniband/hw/mlx5/counters.c
1257
if (!MLX5_CAP_GEN(dev->mdev, max_qp_cnt))
drivers/infiniband/hw/mlx5/counters.c
1271
if (!MLX5_CAP_GEN(dev->mdev, max_qp_cnt))
drivers/infiniband/hw/mlx5/counters.c
226
return MLX5_CAP_GEN(dev->mdev, q_counter_other_vport) &&
drivers/infiniband/hw/mlx5/counters.c
227
MLX5_CAP_GEN(dev->mdev, q_counter_aggregation);
drivers/infiniband/hw/mlx5/counters.c
422
if (MLX5_CAP_GEN(dev->mdev, cc_query_allowed)) {
drivers/infiniband/hw/mlx5/counters.c
715
if (MLX5_CAP_GEN(dev->mdev, out_of_seq_cnt)) {
drivers/infiniband/hw/mlx5/counters.c
725
if (MLX5_CAP_GEN(dev->mdev, retransmission_q_counters)) {
drivers/infiniband/hw/mlx5/counters.c
735
if (MLX5_CAP_GEN(dev->mdev, enhanced_error_q_counters)) {
drivers/infiniband/hw/mlx5/counters.c
745
if (MLX5_CAP_GEN(dev->mdev, roce_accl)) {
drivers/infiniband/hw/mlx5/counters.c
755
if (MLX5_CAP_GEN(dev->mdev, cc_query_allowed)) {
drivers/infiniband/hw/mlx5/counters.c
814
if (MLX5_CAP_GEN(dev->mdev, out_of_seq_cnt))
drivers/infiniband/hw/mlx5/counters.c
819
if (MLX5_CAP_GEN(dev->mdev, retransmission_q_counters))
drivers/infiniband/hw/mlx5/counters.c
824
if (MLX5_CAP_GEN(dev->mdev, enhanced_error_q_counters))
drivers/infiniband/hw/mlx5/counters.c
829
if (MLX5_CAP_GEN(dev->mdev, roce_accl))
drivers/infiniband/hw/mlx5/counters.c
837
if (MLX5_CAP_GEN(dev->mdev, cc_query_allowed)) {
drivers/infiniband/hw/mlx5/counters.c
974
is_shared = MLX5_CAP_GEN(dev->mdev, log_max_uctx) != 0;
drivers/infiniband/hw/mlx5/cq.c
1058
if (attr->cqe > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)))
drivers/infiniband/hw/mlx5/cq.c
1062
if (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)))
drivers/infiniband/hw/mlx5/cq.c
1215
if (!MLX5_CAP_GEN(dev->mdev, cq_moderation))
drivers/infiniband/hw/mlx5/cq.c
1355
if (!MLX5_CAP_GEN(dev->mdev, cq_resize)) {
drivers/infiniband/hw/mlx5/cq.c
1360
if (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)))
drivers/infiniband/hw/mlx5/cq.c
1364
if (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)) + 1)
drivers/infiniband/hw/mlx5/cq.c
711
if (MLX5_CAP_GEN(dev->mdev, mini_cqe_resp_stride_index))
drivers/infiniband/hw/mlx5/cq.c
810
MLX5_CAP_GEN(dev->mdev, cqe_compression_128)) ||
drivers/infiniband/hw/mlx5/cq.c
812
MLX5_CAP_GEN(dev->mdev, cqe_compression)))) {
drivers/infiniband/hw/mlx5/cq.c
835
!MLX5_CAP_GEN(dev->mdev, cqe_128_always)) {
drivers/infiniband/hw/mlx5/cq.c
970
if (attr->cqe > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)))
drivers/infiniband/hw/mlx5/cq.c
977
if (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)))
drivers/infiniband/hw/mlx5/devx.c
129
if (MLX5_CAP_GEN(dev->mdev, uctx_cap) & MLX5_UCTX_CAP_RDMA_CTRL)
drivers/infiniband/hw/mlx5/devx.c
136
if (MLX5_CAP_GEN(dev->mdev, uctx_cap) &
drivers/infiniband/hw/mlx5/devx.c
1517
if (!MLX5_CAP_GEN(dev->mdev, apu) ||
drivers/infiniband/hw/mlx5/devx.c
156
if (!MLX5_CAP_GEN(dev->mdev, log_max_uctx))
drivers/infiniband/hw/mlx5/devx.c
161
(MLX5_CAP_GEN(dev->mdev, uctx_cap) & MLX5_UCTX_CAP_RAW_TX) &&
drivers/infiniband/hw/mlx5/devx.c
165
(MLX5_CAP_GEN(dev->mdev, uctx_cap) &
drivers/infiniband/hw/mlx5/devx.c
2034
if (MLX5_CAP_GEN(dev, event_cap)) {
drivers/infiniband/hw/mlx5/devx.c
2475
if (!MLX5_CAP_GEN(dev, event_cap))
drivers/infiniband/hw/mlx5/devx.c
3250
return MLX5_CAP_GEN(dev->mdev, log_max_uctx);
drivers/infiniband/hw/mlx5/fs.c
1896
*esw_owner_vhca_id = MLX5_CAP_GEN(esw_mdev, vhca_id);
drivers/infiniband/hw/mlx5/fs.c
691
return MLX5_CAP_GEN(dev->mdev, shared_object_to_user_object_allowed);
drivers/infiniband/hw/mlx5/gsi.c
271
if (MLX5_CAP_GEN(dev->mdev, port_type) != MLX5_CAP_PORT_TYPE_IB)
drivers/infiniband/hw/mlx5/gsi.c
43
return MLX5_CAP_GEN(dev->mdev, set_deth_sqpn);
drivers/infiniband/hw/mlx5/gsi.c
99
if (MLX5_CAP_GEN(dev->mdev,
drivers/infiniband/hw/mlx5/mad.c
228
if (MLX5_CAP_GEN(dev->mdev, num_ports) == 1 &&
drivers/infiniband/hw/mlx5/mad.c
331
if (MLX5_CAP_GEN(dev->mdev, vport_counters) &&
drivers/infiniband/hw/mlx5/mad.c
632
props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg);
drivers/infiniband/hw/mlx5/main.c
1000
if (MLX5_CAP_GEN(mdev, imaicl)) {
drivers/infiniband/hw/mlx5/main.c
1003
props->max_mw = 1 << MLX5_CAP_GEN(mdev, log_max_mkey);
drivers/infiniband/hw/mlx5/main.c
1008
if (!MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled))
drivers/infiniband/hw/mlx5/main.c
1010
if (MLX5_CAP_GEN(mdev, sho)) {
drivers/infiniband/hw/mlx5/main.c
1019
if (MLX5_CAP_GEN(mdev, block_lb_mc))
drivers/infiniband/hw/mlx5/main.c
1022
if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && raw_support) {
drivers/infiniband/hw/mlx5/main.c
1065
if (MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) {
drivers/infiniband/hw/mlx5/main.c
1070
if (MLX5_CAP_GEN(dev->mdev, rq_delay_drop) &&
drivers/infiniband/hw/mlx5/main.c
1071
MLX5_CAP_GEN(dev->mdev, general_notification_event) &&
drivers/infiniband/hw/mlx5/main.c
1075
if (MLX5_CAP_GEN(mdev, ipoib_enhanced_offloads) &&
drivers/infiniband/hw/mlx5/main.c
1079
if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) &&
drivers/infiniband/hw/mlx5/main.c
1095
if (MLX5_CAP_GEN(mdev, end_pad))
drivers/infiniband/hw/mlx5/main.c
1103
props->max_qp = 1 << MLX5_CAP_GEN(mdev, log_max_qp);
drivers/infiniband/hw/mlx5/main.c
1105
max_rq_sg = MLX5_CAP_GEN(mdev, max_wqe_sz_rq) /
drivers/infiniband/hw/mlx5/main.c
1107
max_sq_desc = min_t(int, MLX5_CAP_GEN(mdev, max_wqe_sz_sq), 512);
drivers/infiniband/hw/mlx5/main.c
1114
props->max_cq = 1 << MLX5_CAP_GEN(mdev, log_max_cq);
drivers/infiniband/hw/mlx5/main.c
1115
props->max_cqe = (1 << MLX5_CAP_GEN(mdev, log_max_cq_sz)) - 1;
drivers/infiniband/hw/mlx5/main.c
1116
props->max_mr = 1 << MLX5_CAP_GEN(mdev, log_max_mkey);
drivers/infiniband/hw/mlx5/main.c
1117
props->max_pd = 1 << MLX5_CAP_GEN(mdev, log_max_pd);
drivers/infiniband/hw/mlx5/main.c
1118
props->max_qp_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_req_qp);
drivers/infiniband/hw/mlx5/main.c
1119
props->max_qp_init_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_res_qp);
drivers/infiniband/hw/mlx5/main.c
1120
props->max_srq = 1 << MLX5_CAP_GEN(mdev, log_max_srq);
drivers/infiniband/hw/mlx5/main.c
1121
props->max_srq_wr = (1 << MLX5_CAP_GEN(mdev, log_max_srq_sz)) - 1;
drivers/infiniband/hw/mlx5/main.c
1122
props->local_ca_ack_delay = MLX5_CAP_GEN(mdev, local_ca_ack_delay);
drivers/infiniband/hw/mlx5/main.c
1126
1 << MLX5_CAP_GEN(mdev, log_max_klm_list_size);
drivers/infiniband/hw/mlx5/main.c
1130
MLX5_CAP_GEN(mdev, max_sgl_for_optimized_performance);
drivers/infiniband/hw/mlx5/main.c
1133
props->max_mcast_grp = 1 << MLX5_CAP_GEN(mdev, log_max_mcg);
drivers/infiniband/hw/mlx5/main.c
1134
props->max_mcast_qp_attach = MLX5_CAP_GEN(mdev, max_qp_mcg);
drivers/infiniband/hw/mlx5/main.c
1138
props->hca_core_clock = MLX5_CAP_GEN(mdev, device_frequency_khz);
drivers/infiniband/hw/mlx5/main.c
114
int port_type_cap = MLX5_CAP_GEN(dev->mdev, port_type);
drivers/infiniband/hw/mlx5/main.c
1170
1 << MLX5_CAP_GEN(dev->mdev, log_max_rqt);
drivers/infiniband/hw/mlx5/main.c
1172
1 << MLX5_CAP_GEN(dev->mdev, log_max_rqt_size);
drivers/infiniband/hw/mlx5/main.c
1175
1 << MLX5_CAP_GEN(dev->mdev, log_max_rq);
drivers/infiniband/hw/mlx5/main.c
1178
if (MLX5_CAP_GEN(mdev, tag_matching)) {
drivers/infiniband/hw/mlx5/main.c
1180
(1 << MLX5_CAP_GEN(mdev, log_tag_matching_list_sz)) - 1;
drivers/infiniband/hw/mlx5/main.c
1182
1 << MLX5_CAP_GEN(mdev, log_max_qp_sz);
drivers/infiniband/hw/mlx5/main.c
1186
if (MLX5_CAP_GEN(mdev, tag_matching) &&
drivers/infiniband/hw/mlx5/main.c
1187
MLX5_CAP_GEN(mdev, rndv_offload_rc)) {
drivers/infiniband/hw/mlx5/main.c
1192
if (MLX5_CAP_GEN(dev->mdev, cq_moderation)) {
drivers/infiniband/hw/mlx5/main.c
1202
if (MLX5_CAP_GEN(dev->mdev, cqe_compression)) {
drivers/infiniband/hw/mlx5/main.c
1204
MLX5_CAP_GEN(dev->mdev,
drivers/infiniband/hw/mlx5/main.c
1211
if (MLX5_CAP_GEN(dev->mdev, mini_cqe_resp_stride_index))
drivers/infiniband/hw/mlx5/main.c
1218
if (MLX5_CAP_GEN(mdev, qos)) {
drivers/infiniband/hw/mlx5/main.c
1261
if (MLX5_CAP_GEN(mdev, cqe_compression_128))
drivers/infiniband/hw/mlx5/main.c
1265
if (MLX5_CAP_GEN(mdev, cqe_128_always))
drivers/infiniband/hw/mlx5/main.c
1267
if (MLX5_CAP_GEN(mdev, qp_packet_based))
drivers/infiniband/hw/mlx5/main.c
1274
(MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_xrc) ||
drivers/infiniband/hw/mlx5/main.c
1275
MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_dc) ||
drivers/infiniband/hw/mlx5/main.c
1276
MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_rc) ||
drivers/infiniband/hw/mlx5/main.c
1277
MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_ud) ||
drivers/infiniband/hw/mlx5/main.c
1278
MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_uc)))
drivers/infiniband/hw/mlx5/main.c
1305
if (MLX5_CAP_GEN(mdev, striding_rq)) {
drivers/infiniband/hw/mlx5/main.c
1310
if (MLX5_CAP_GEN(dev->mdev, ext_stride_num_range))
drivers/infiniband/hw/mlx5/main.c
1348
MLX5_CAP_GEN(mdev, log_max_dci_stream_channels);
drivers/infiniband/hw/mlx5/main.c
1351
MLX5_CAP_GEN(mdev, log_max_dci_errored_streams);
drivers/infiniband/hw/mlx5/main.c
1505
props->gid_tbl_len = mlx5_get_gid_table_len(MLX5_CAP_GEN(mdev, gid_table_size));
drivers/infiniband/hw/mlx5/main.c
1506
props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg);
drivers/infiniband/hw/mlx5/main.c
1507
props->pkey_tbl_len = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev, pkey_table_size));
drivers/infiniband/hw/mlx5/main.c
1868
if (MLX5_CAP_GEN(dev->mdev, ib_virt) && is_ib) {
drivers/infiniband/hw/mlx5/main.c
1935
MLX5_CAP_GEN(dev->mdev, uar_4k) ? "yes" : "no",
drivers/infiniband/hw/mlx5/main.c
2083
if (!MLX5_CAP_GEN(dev->mdev, log_max_transport_domain))
drivers/infiniband/hw/mlx5/main.c
2090
if ((MLX5_CAP_GEN(dev->mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) ||
drivers/infiniband/hw/mlx5/main.c
2091
(!MLX5_CAP_GEN(dev->mdev, disable_local_lb_uc) &&
drivers/infiniband/hw/mlx5/main.c
2092
!MLX5_CAP_GEN(dev->mdev, disable_local_lb_mc)))
drivers/infiniband/hw/mlx5/main.c
2105
if (!MLX5_CAP_GEN(dev->mdev, log_max_transport_domain))
drivers/infiniband/hw/mlx5/main.c
2110
if ((MLX5_CAP_GEN(dev->mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) ||
drivers/infiniband/hw/mlx5/main.c
2111
(!MLX5_CAP_GEN(dev->mdev, disable_local_lb_uc) &&
drivers/infiniband/hw/mlx5/main.c
2112
!MLX5_CAP_GEN(dev->mdev, disable_local_lb_mc)))
drivers/infiniband/hw/mlx5/main.c
2126
if (MLX5_CAP_GEN(dev->mdev, dump_fill_mkey)) {
drivers/infiniband/hw/mlx5/main.c
2132
resp->qp_tab_size = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp);
drivers/infiniband/hw/mlx5/main.c
2134
resp->bf_reg_size = 1 << MLX5_CAP_GEN(dev->mdev,
drivers/infiniband/hw/mlx5/main.c
2137
resp->max_sq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq);
drivers/infiniband/hw/mlx5/main.c
2138
resp->max_rq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq);
drivers/infiniband/hw/mlx5/main.c
2139
resp->max_send_wqebb = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz);
drivers/infiniband/hw/mlx5/main.c
2140
resp->max_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz);
drivers/infiniband/hw/mlx5/main.c
2141
resp->max_srq_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_srq_sz);
drivers/infiniband/hw/mlx5/main.c
2143
resp->log_uar_size = MLX5_CAP_GEN(dev->mdev, uar_4k) ?
drivers/infiniband/hw/mlx5/main.c
2145
resp->num_uars_per_page = MLX5_CAP_GEN(dev->mdev, uar_4k) ?
drivers/infiniband/hw/mlx5/main.c
2146
MLX5_CAP_GEN(dev->mdev,
drivers/infiniband/hw/mlx5/main.c
2176
if (MLX5_CAP_GEN(dev->mdev, ece_support))
drivers/infiniband/hw/mlx5/main.c
2179
if (rt_supported(MLX5_CAP_GEN(dev->mdev, sq_ts_format)) &&
drivers/infiniband/hw/mlx5/main.c
2180
rt_supported(MLX5_CAP_GEN(dev->mdev, rq_ts_format)) &&
drivers/infiniband/hw/mlx5/main.c
2187
if (MLX5_CAP_GEN(dev->mdev, drain_sigerr))
drivers/infiniband/hw/mlx5/main.c
2300
(__u8)MLX5_CAP_GEN(dev->mdev, cqe_version),
drivers/infiniband/hw/mlx5/main.c
2401
fw_uars_per_page = MLX5_CAP_GEN(dev->mdev, uar_4k) ? MLX5_UARS_IN_PAGE : 1;
drivers/infiniband/hw/mlx5/main.c
2411
fw_uars_per_page = MLX5_CAP_GEN(dev->mdev, uar_4k) ?
drivers/infiniband/hw/mlx5/main.c
3262
if (!MLX5_CAP_GEN(mdev, ib_virt) || !MLX5_CAP_GEN_2(mdev, multiplane))
drivers/infiniband/hw/mlx5/main.c
3279
if (MLX5_CAP_GEN(dev->mdev, port_type) != MLX5_CAP_PORT_TYPE_IB)
drivers/infiniband/hw/mlx5/main.c
3286
} else if (!MLX5_CAP_GEN(dev->mdev, ib_virt) ||
drivers/infiniband/hw/mlx5/main.c
3437
if (!MLX5_CAP_GEN(dev->mdev, xrc))
drivers/infiniband/hw/mlx5/main.c
3517
if (MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write)) {
drivers/infiniband/hw/mlx5/main.c
3522
if (MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read)) {
drivers/infiniband/hw/mlx5/main.c
4027
if (!MLX5_CAP_GEN(dev->mdev, data_direct) ||
drivers/infiniband/hw/mlx5/main.c
4049
if (!MLX5_CAP_GEN(dev->mdev, data_direct) ||
drivers/infiniband/hw/mlx5/main.c
4258
if (!MLX5_CAP_GEN(to_mdev(c->ibucontext.device)->mdev,
drivers/infiniband/hw/mlx5/main.c
4329
MLX5_CAP_GEN(dev->mdev, tlp_device_emulation_manager);
drivers/infiniband/hw/mlx5/main.c
4734
if (MLX5_CAP_GEN(dev->mdev, uctx_cap) & MLX5_UCTX_CAP_RDMA_CTRL)
drivers/infiniband/hw/mlx5/main.c
4737
if (MLX5_CAP_GEN(dev->mdev, uctx_cap) &
drivers/infiniband/hw/mlx5/main.c
4746
if (MLX5_CAP_GEN(dev->mdev, uctx_cap) & MLX5_UCTX_CAP_RDMA_CTRL) {
drivers/infiniband/hw/mlx5/main.c
4752
if (MLX5_CAP_GEN(dev->mdev, uctx_cap) &
drivers/infiniband/hw/mlx5/main.c
4762
if (MLX5_CAP_GEN(dev->mdev, uctx_cap) & MLX5_UCTX_CAP_RDMA_CTRL)
drivers/infiniband/hw/mlx5/main.c
4787
if (MLX5_CAP_GEN(mdev, ipoib_enhanced_offloads) &&
drivers/infiniband/hw/mlx5/main.c
4795
dev->umr_fence = mlx5_get_umr_fence(MLX5_CAP_GEN(mdev, umr_fence));
drivers/infiniband/hw/mlx5/main.c
4797
if (MLX5_CAP_GEN(mdev, imaicl))
drivers/infiniband/hw/mlx5/main.c
4800
if (MLX5_CAP_GEN(mdev, xrc))
drivers/infiniband/hw/mlx5/main.c
4834
if (MLX5_CAP_GEN(dev->mdev, tlp_device_emulation_manager)) {
drivers/infiniband/hw/mlx5/main.c
4893
port_type_cap = MLX5_CAP_GEN(mdev, port_type);
drivers/infiniband/hw/mlx5/main.c
4922
port_type_cap = MLX5_CAP_GEN(mdev, port_type);
drivers/infiniband/hw/mlx5/main.c
5303
ll = mlx5_port_type_cap_to_rdma_ll(MLX5_CAP_GEN(mparent->mdev,
drivers/infiniband/hw/mlx5/main.c
5420
port_type_cap = MLX5_CAP_GEN(mdev, port_type);
drivers/infiniband/hw/mlx5/main.c
5423
num_ports = max(MLX5_CAP_GEN(mdev, num_ports),
drivers/infiniband/hw/mlx5/main.c
5424
MLX5_CAP_GEN(mdev, num_vhca_ports));
drivers/infiniband/hw/mlx5/main.c
601
props->max_msg_sz = 1 << MLX5_CAP_GEN(dev->mdev, log_max_msg);
drivers/infiniband/hw/mlx5/main.c
719
if (MLX5_CAP_GEN(dev->mdev, port_type) == MLX5_CAP_PORT_TYPE_IB)
drivers/infiniband/hw/mlx5/main.c
720
return !MLX5_CAP_GEN(dev->mdev, ib_virt);
drivers/infiniband/hw/mlx5/main.c
816
*max_pkeys = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev,
drivers/infiniband/hw/mlx5/main.c
932
u32 max_wqe_bb_units = 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz);
drivers/infiniband/hw/mlx5/main.c
956
u64 min_page_size = 1ull << MLX5_CAP_GEN(mdev, log_pg_sz);
drivers/infiniband/hw/mlx5/main.c
992
if (MLX5_CAP_GEN(mdev, pkv))
drivers/infiniband/hw/mlx5/main.c
994
if (MLX5_CAP_GEN(mdev, qkv))
drivers/infiniband/hw/mlx5/main.c
996
if (MLX5_CAP_GEN(mdev, apm))
drivers/infiniband/hw/mlx5/main.c
998
if (MLX5_CAP_GEN(mdev, xrc))
drivers/infiniband/hw/mlx5/mlx5_ib.h
1587
return lib_support && MLX5_CAP_GEN(dev->mdev, uar_4k) ?
drivers/infiniband/hw/mlx5/mlx5_ib.h
1638
(MLX5_CAP_GEN(dev->mdev, num_lag_ports) > 1 &&
drivers/infiniband/hw/mlx5/mlx5_ib.h
1639
MLX5_CAP_GEN(dev->mdev, lag_tx_port_affinity));
drivers/infiniband/hw/mlx5/mlx5_ib.h
1678
if (!MLX5_CAP_GEN(dev->mdev, ats) || !umem->is_dmabuf)
drivers/infiniband/hw/mlx5/mr.c
145
MLX5_CAP_GEN(dev->mdev, atomic) &&
drivers/infiniband/hw/mlx5/mr.c
146
MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))
drivers/infiniband/hw/mlx5/mr.c
150
MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write) &&
drivers/infiniband/hw/mlx5/mr.c
151
!MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write_umr))
drivers/infiniband/hw/mlx5/mr.c
155
(MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read) ||
drivers/infiniband/hw/mlx5/mr.c
1553
MLX5_SET(mkc, mkc, ma_translation_mode, MLX5_CAP_GEN(dev->mdev, ats));
drivers/infiniband/hw/mlx5/mr.c
156
MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read_pci_enabled)) &&
drivers/infiniband/hw/mlx5/mr.c
157
!MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read_umr))
drivers/infiniband/hw/mlx5/mr.c
326
if ((in->ats && !MLX5_CAP_GEN(dev->mdev, ats)) ||
drivers/infiniband/hw/mlx5/mr.c
386
MLX5_SET(mkc, mkc, ma_translation_mode, MLX5_CAP_GEN(dev->mdev, ats));
drivers/infiniband/hw/mlx5/mr.c
485
if (!MLX5_CAP_GEN(dev->mdev, crossing_vhca_mkey))
drivers/infiniband/hw/mlx5/mr.c
501
MLX5_CAP_GEN(dev->mdev, vhca_id));
drivers/infiniband/hw/mlx5/mr.c
52
if (MLX5_CAP_GEN(dev->mdev, umr_extended_translation_offset))
drivers/infiniband/hw/mlx5/mr.c
546
bool pg_cap = !!(MLX5_CAP_GEN(dev->mdev, pg)) &&
drivers/infiniband/hw/mlx5/mr.c
75
if (MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write))
drivers/infiniband/hw/mlx5/mr.c
78
if (MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read) ||
drivers/infiniband/hw/mlx5/mr.c
79
(MLX5_CAP_GEN(dev->mdev,
drivers/infiniband/hw/mlx5/odp.c
1074
if (depth >= MLX5_CAP_GEN(dev->mdev, max_indirection)) {
drivers/infiniband/hw/mlx5/odp.c
369
if (!MLX5_CAP_GEN(dev->mdev, pg) || !mlx5r_umr_can_load_pas(dev, 0))
drivers/infiniband/hw/mlx5/odp.c
374
if (MLX5_CAP_GEN(dev->mdev, umr_extended_translation_offset))
drivers/infiniband/hw/mlx5/odp.c
421
if (MLX5_CAP_GEN(dev->mdev, fixed_buffer_size) &&
drivers/infiniband/hw/mlx5/odp.c
422
MLX5_CAP_GEN(dev->mdev, null_mkey) &&
drivers/infiniband/hw/mlx5/odp.c
423
MLX5_CAP_GEN(dev->mdev, umr_extended_translation_offset) &&
drivers/infiniband/hw/mlx5/odp.c
424
!MLX5_CAP_GEN(dev->mdev, umr_indirect_mkey_disabled) &&
drivers/infiniband/hw/mlx5/qos.c
19
return (MLX5_CAP_GEN(dev->mdev, qos) &&
drivers/infiniband/hw/mlx5/qp.c
1134
qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2;
drivers/infiniband/hw/mlx5/qp.c
1308
u8 ts_cap = MLX5_CAP_GEN(dev->mdev, rq_ts_format);
drivers/infiniband/hw/mlx5/qp.c
1316
u8 ts_cap = MLX5_CAP_GEN(dev->mdev, sq_ts_format);
drivers/infiniband/hw/mlx5/qp.c
1408
if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) &&
drivers/infiniband/hw/mlx5/qp.c
1966
MLX5_CAP_GEN(dev->mdev, dc_req_scat_data_cqe))
drivers/infiniband/hw/mlx5/qp.c
1993
u8 atomic = MLX5_CAP_GEN(dev->mdev, atomic);
drivers/infiniband/hw/mlx5/qp.c
2068
if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1)
drivers/infiniband/hw/mlx5/qp.c
2086
if (MLX5_CAP_GEN(mdev, ece_support))
drivers/infiniband/hw/mlx5/qp.c
2142
if (ucmd->sq_wqe_count > (1 << MLX5_CAP_GEN(mdev, log_max_qp_sz)))
drivers/infiniband/hw/mlx5/qp.c
2156
if (MLX5_CAP_GEN(mdev, ece_support))
drivers/infiniband/hw/mlx5/qp.c
2213
if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1)
drivers/infiniband/hw/mlx5/qp.c
2231
if (MLX5_CAP_GEN(mdev, ece_support))
drivers/infiniband/hw/mlx5/qp.c
2309
if (ucmd->sq_wqe_count > (1 << MLX5_CAP_GEN(mdev, log_max_qp_sz)))
drivers/infiniband/hw/mlx5/qp.c
2327
if (MLX5_CAP_GEN(mdev, ece_support))
drivers/infiniband/hw/mlx5/qp.c
2408
if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1)
drivers/infiniband/hw/mlx5/qp.c
2435
if (MLX5_CAP_GEN(mdev, ece_support))
drivers/infiniband/hw/mlx5/qp.c
2552
if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1)
drivers/infiniband/hw/mlx5/qp.c
2560
MLX5_CAP_GEN(mdev, go_back_n))
drivers/infiniband/hw/mlx5/qp.c
2772
if (mlx5_lag_is_active(dev->mdev) && !MLX5_CAP_GEN(dev->mdev, lag_dct))
drivers/infiniband/hw/mlx5/qp.c
2786
if (MLX5_CAP_GEN(dev->mdev, ece_support))
drivers/infiniband/hw/mlx5/qp.c
2803
if (attr->qp_type == IB_QPT_DRIVER && !MLX5_CAP_GEN(dev->mdev, dct))
drivers/infiniband/hw/mlx5/qp.c
2809
if (!MLX5_CAP_GEN(dev->mdev, xrc))
drivers/infiniband/hw/mlx5/qp.c
2885
return MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_rc);
drivers/infiniband/hw/mlx5/qp.c
2888
return MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_xrc);
drivers/infiniband/hw/mlx5/qp.c
2890
return MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_uc);
drivers/infiniband/hw/mlx5/qp.c
2892
return MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_ud);
drivers/infiniband/hw/mlx5/qp.c
2895
return MLX5_CAP_GEN(mdev, dp_ordering_ooo_all_dc);
drivers/infiniband/hw/mlx5/qp.c
2961
MLX5_CAP_GEN(mdev, log_max_dci_stream_channels),
drivers/infiniband/hw/mlx5/qp.c
2966
MLX5_CAP_GEN(mdev, sctr_data_cqe), qp);
drivers/infiniband/hw/mlx5/qp.c
2968
MLX5_CAP_GEN(mdev, sctr_data_cqe), qp);
drivers/infiniband/hw/mlx5/qp.c
2987
MLX5_CAP_GEN(mdev, qp_packet_based), qp);
drivers/infiniband/hw/mlx5/qp.c
3042
MLX5_CAP_GEN(mdev, sho), qp);
drivers/infiniband/hw/mlx5/qp.c
3045
MLX5_CAP_GEN(mdev, block_lb_mc), qp);
drivers/infiniband/hw/mlx5/qp.c
3047
MLX5_CAP_GEN(mdev, cd), qp);
drivers/infiniband/hw/mlx5/qp.c
3049
MLX5_CAP_GEN(mdev, cd), qp);
drivers/infiniband/hw/mlx5/qp.c
3051
MLX5_CAP_GEN(mdev, cd), qp);
drivers/infiniband/hw/mlx5/qp.c
3056
MLX5_CAP_GEN(mdev, ipoib_basic_offloads),
drivers/infiniband/hw/mlx5/qp.c
3058
cond = MLX5_CAP_GEN(mdev, port_type) == MLX5_CAP_PORT_TYPE_IB;
drivers/infiniband/hw/mlx5/qp.c
3064
cond = MLX5_CAP_GEN(mdev, eth_net_offloads) &&
drivers/infiniband/hw/mlx5/qp.c
3069
cond = MLX5_CAP_GEN(mdev, eth_net_offloads) &&
drivers/infiniband/hw/mlx5/qp.c
3077
MLX5_CAP_GEN(mdev, end_pad), qp);
drivers/infiniband/hw/mlx5/qp.c
336
if (!MLX5_CAP_GEN(dev->mdev, qpc_extension) ||
drivers/infiniband/hw/mlx5/qp.c
337
!MLX5_CAP_GEN(dev->mdev, qp_error_syndrome))
drivers/infiniband/hw/mlx5/qp.c
3496
stat_rate_support = MLX5_CAP_GEN(dev->mdev, stat_rate_support);
drivers/infiniband/hw/mlx5/qp.c
3859
if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) {
drivers/infiniband/hw/mlx5/qp.c
4137
(dev->lag_active ? dev->lag_ports : MLX5_CAP_GEN(dev->mdev, num_lag_ports)) + 1;
drivers/infiniband/hw/mlx5/qp.c
4334
MLX5_CAP_GEN(dev->mdev, init2_lag_tx_port_affinity))
drivers/infiniband/hw/mlx5/qp.c
4354
MLX5_CAP_GEN(dev->mdev, log_max_msg));
drivers/infiniband/hw/mlx5/qp.c
450
if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)))
drivers/infiniband/hw/mlx5/qp.c
4533
MLX5_CAP_GEN(dev->mdev, ece_support) ?
drivers/infiniband/hw/mlx5/qp.c
4667
if (MLX5_CAP_GEN(dev->mdev, ece_support) && ucmd->ece_options)
drivers/infiniband/hw/mlx5/qp.c
4752
if (MLX5_CAP_GEN(dev->mdev, ece_support))
drivers/infiniband/hw/mlx5/qp.c
4787
log_max_ra_res = 1 << MLX5_CAP_GEN(dev->mdev,
drivers/infiniband/hw/mlx5/qp.c
4789
log_max_ra_req = 1 << MLX5_CAP_GEN(dev->mdev,
drivers/infiniband/hw/mlx5/qp.c
4792
log_max_ra_res = 1 << MLX5_CAP_GEN(dev->mdev,
drivers/infiniband/hw/mlx5/qp.c
4794
log_max_ra_req = 1 << MLX5_CAP_GEN(dev->mdev,
drivers/infiniband/hw/mlx5/qp.c
482
if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) {
drivers/infiniband/hw/mlx5/qp.c
485
MLX5_CAP_GEN(dev->mdev,
drivers/infiniband/hw/mlx5/qp.c
5301
if (!MLX5_CAP_GEN(dev->mdev, xrc))
drivers/infiniband/hw/mlx5/qp.c
5396
if (!MLX5_CAP_GEN(dev->mdev, end_pad)) {
drivers/infiniband/hw/mlx5/qp.c
5428
has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads);
drivers/infiniband/hw/mlx5/qp.c
5479
if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz)))
drivers/infiniband/hw/mlx5/qp.c
5501
if (!MLX5_CAP_GEN(dev->mdev, ext_stride_num_range) &&
drivers/infiniband/hw/mlx5/qp.c
5526
if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) {
drivers/infiniband/hw/mlx5/qp.c
5546
MLX5_CAP_GEN(dev->mdev, ext_stride_num_range) ?
drivers/infiniband/hw/mlx5/qp.c
5673
MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) {
drivers/infiniband/hw/mlx5/qp.c
5676
MLX5_CAP_GEN(dev->mdev, log_max_rqt_size));
drivers/infiniband/hw/mlx5/qp.c
5770
if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) &&
drivers/infiniband/hw/mlx5/qp.c
5793
if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) {
drivers/infiniband/hw/mlx5/qp.c
5957
if (!MLX5_CAP_GEN(dev->mdev, rts2rts_qp_counters_set_id)) {
drivers/infiniband/hw/mlx5/qp.c
612
if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) {
drivers/infiniband/hw/mlx5/qp.c
614
wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq));
drivers/infiniband/hw/mlx5/qp.c
624
if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) {
drivers/infiniband/hw/mlx5/qp.c
628
1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz));
drivers/infiniband/hw/mlx5/qp.c
651
if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) {
drivers/infiniband/hw/mlx5/qp.c
653
desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq));
drivers/infiniband/hw/mlx5/qp.c
665
if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) {
drivers/infiniband/hw/mlx5/qp.c
668
1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz));
drivers/infiniband/hw/mlx5/srq.c
145
if (MLX5_CAP_GEN(dev->mdev, cqe_version) == MLX5_CQE_VERSION_V1 &&
drivers/infiniband/hw/mlx5/srq.c
192
__u32 max_srq_wqes = 1 << MLX5_CAP_GEN(dev->mdev, log_max_srq_sz);
drivers/infiniband/hw/mlx5/srq.c
193
__u32 max_sge_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq) /
drivers/infiniband/hw/mlx5/srq.c
263
MLX5_CAP_GEN(dev->mdev, log_tag_matching_list_sz)) {
drivers/infiniband/hw/mlx5/srq.c
84
if (MLX5_CAP_GEN(dev->mdev, cqe_version) == MLX5_CQE_VERSION_V1 &&
drivers/infiniband/hw/mlx5/std_types.c
105
info->vport_vhca_id = MLX5_CAP_GEN(mdev, vhca_id);
drivers/infiniband/hw/mlx5/std_types.c
137
info->esw_owner_vhca_id = MLX5_CAP_GEN(mdev, vhca_id);
drivers/infiniband/hw/mlx5/umr.c
448
(MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read) ||
drivers/infiniband/hw/mlx5/umr.c
58
if (MLX5_CAP_GEN(dev->mdev, atomic))
drivers/infiniband/hw/mlx5/umr.c
61
if (MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write_umr))
drivers/infiniband/hw/mlx5/umr.c
64
if (MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read_umr))
drivers/infiniband/hw/mlx5/umr.c
82
MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled))
drivers/infiniband/hw/mlx5/umr.c
845
return !MLX5_CAP_GEN(dev->mdev, umr_indirect_mkey_disabled);
drivers/infiniband/hw/mlx5/umr.c
86
MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))
drivers/infiniband/hw/mlx5/umr.c
90
!MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write_umr))
drivers/infiniband/hw/mlx5/umr.c
94
!MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read_umr))
drivers/infiniband/hw/mlx5/umr.h
34
if (MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled))
drivers/infiniband/hw/mlx5/umr.h
41
if (!MLX5_CAP_GEN(dev->mdev, umr_extended_translation_offset) &&
drivers/infiniband/hw/mlx5/umr.h
59
MLX5_CAP_GEN(dev->mdev, atomic) &&
drivers/infiniband/hw/mlx5/umr.h
60
MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))
drivers/infiniband/hw/mlx5/umr.h
64
MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write) &&
drivers/infiniband/hw/mlx5/umr.h
65
!MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write_umr))
drivers/infiniband/hw/mlx5/umr.h
69
(MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read) ||
drivers/infiniband/hw/mlx5/umr.h
70
MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read_pci_enabled)) &&
drivers/infiniband/hw/mlx5/umr.h
71
!MLX5_CAP_GEN(dev->mdev, relaxed_ordering_read_umr))
drivers/net/ethernet/mellanox/mlx5/core/debugfs.c
307
MLX5_CAP_GEN(dev, icm_mng_function_id_mode) ==
drivers/net/ethernet/mellanox/mlx5/core/debugfs.c
655
seq_printf(file, "0x%x\n", MLX5_CAP_GEN(dev, vhca_id));
drivers/net/ethernet/mellanox/mlx5/core/dev.c
103
if (!MLX5_CAP_GEN(dev, cq_moderation))
drivers/net/ethernet/mellanox/mlx5/core/dev.c
170
if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
drivers/net/ethernet/mellanox/mlx5/core/dev.c
237
return MLX5_CAP_GEN(dev, uctx_cap) && !mlx5_core_is_sf(dev);
drivers/net/ethernet/mellanox/mlx5/core/dev.c
62
if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
drivers/net/ethernet/mellanox/mlx5/core/dev.c
65
if (!MLX5_CAP_GEN(dev, eth_net_offloads)) {
drivers/net/ethernet/mellanox/mlx5/core/dev.c
70
if (!MLX5_CAP_GEN(dev, nic_flow_table)) {
drivers/net/ethernet/mellanox/mlx5/core/devlink.c
468
if (new_state && !MLX5_CAP_GEN(dev, roce) &&
drivers/net/ethernet/mellanox/mlx5/core/devlink.c
469
!(MLX5_CAP_GEN(dev, roce_rw_supported) && MLX5_CAP_GEN_MAX(dev, roce))) {
drivers/net/ethernet/mellanox/mlx5/core/devlink.c
526
if (val32 > BIT(MLX5_CAP_GEN(dev, log_max_hairpin_num_packets))) {
drivers/net/ethernet/mellanox/mlx5/core/devlink.c
529
BIT(MLX5_CAP_GEN(dev, log_max_hairpin_num_packets)));
drivers/net/ethernet/mellanox/mlx5/core/devlink.c
574
MLX5_CAP_GEN(dev, log_max_hairpin_num_packets)));
drivers/net/ethernet/mellanox/mlx5/core/devlink.c
600
value.vbool = MLX5_CAP_GEN(dev, roce) && !mlx5_dev_is_lightweight(dev);
drivers/net/ethernet/mellanox/mlx5/core/devlink.c
936
value.vu32 = 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list);
drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c
102
if (MLX5_CAP_GEN(dev, vnic_env_cnt_steering_fail)) {
drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c
108
if (MLX5_CAP_GEN(dev, nic_cap_reg))
drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c
110
if (MLX5_CAP_GEN(dev, vnic_env_cnt_bar_uar_access))
drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c
113
if (MLX5_CAP_GEN(dev, vnic_env_cnt_odp_page_fault)) {
drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c
78
if (MLX5_CAP_GEN(dev, vnic_env_queue_counters)) {
drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c
84
if (MLX5_CAP_GEN(dev, eq_overrun_count)) {
drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c
90
if (MLX5_CAP_GEN(dev, vnic_env_cq_overrun))
drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c
93
if (MLX5_CAP_GEN(dev, invalid_command_count))
drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c
96
if (MLX5_CAP_GEN(dev, quota_exceeded_count))
drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c
99
if (MLX5_CAP_GEN(dev, nic_receive_steering_discard))
drivers/net/ethernet/mellanox/mlx5/core/en.h
171
return clamp_t(u8, MLX5_CAP_GEN(mdev, num_lag_ports), 1, MLX5_MAX_PORTS);
drivers/net/ethernet/mellanox/mlx5/core/en.h
193
(u32)(1 << MLX5_CAP_GEN(mdev, log_max_rqt_size)));
drivers/net/ethernet/mellanox/mlx5/core/en.h
205
MLX5_CAP_GEN(mdev, max_wqe_sz_sq) / MLX5_SEND_WQE_BB);
drivers/net/ethernet/mellanox/mlx5/core/en.h
99
(6 + MLX5_CAP_GEN(mdev, cache_line_128byte)) /* HW restriction */
drivers/net/ethernet/mellanox/mlx5/core/en/channels.c
34
*vhca_id = MLX5_CAP_GEN(c->mdev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/en/channels.c
46
*vhca_id = MLX5_CAP_GEN(c->mdev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/en/monitor_stats.c
114
int max_num_of_counters = MLX5_CAP_GEN(mdev, max_num_of_monitor_counters);
drivers/net/ethernet/mellanox/mlx5/core/en/monitor_stats.c
115
int num_q_counters = MLX5_CAP_GEN(mdev, num_q_monitor_counters);
drivers/net/ethernet/mellanox/mlx5/core/en/monitor_stats.c
117
MLX5_CAP_GEN(mdev, num_ppcnt_monitor_counters);
drivers/net/ethernet/mellanox/mlx5/core/en/monitor_stats.c
25
if (!MLX5_CAP_GEN(mdev, max_num_of_monitor_counters))
drivers/net/ethernet/mellanox/mlx5/core/en/monitor_stats.c
28
MLX5_CAP_GEN(mdev, num_ppcnt_monitor_counters) <
drivers/net/ethernet/mellanox/mlx5/core/en/monitor_stats.c
31
if (MLX5_CAP_GEN(mdev, num_q_monitor_counters) <
drivers/net/ethernet/mellanox/mlx5/core/en/params.c
205
1 << MLX5_CAP_GEN(mdev, log_max_klm_list_size));
drivers/net/ethernet/mellanox/mlx5/core/en/params.c
361
if (MLX5_CAP_GEN(mdev, ext_stride_num_range))
drivers/net/ethernet/mellanox/mlx5/core/en/params.c
628
MLX5_CAP_GEN(mdev, mini_cqe_resp_stride_index)) &&
drivers/net/ethernet/mellanox/mlx5/core/en/params.c
850
if (MLX5_CAP_GEN(mdev, cqe_128_always) && cache_line_size() >= 128)
drivers/net/ethernet/mellanox/mlx5/core/en/params.c
883
hw_stridx = MLX5_CAP_GEN(mdev, mini_cqe_resp_stride_index);
drivers/net/ethernet/mellanox/mlx5/core/en/params.c
902
MLX5_CAP_GEN(mdev, enhanced_cqe_compression) ?
drivers/net/ethernet/mellanox/mlx5/core/en/params.c
915
bool ro = MLX5_CAP_GEN(mdev, relaxed_ordering_write);
drivers/net/ethernet/mellanox/mlx5/core/en/params.h
172
MLX5_CAP_GEN(mdev, enhanced_cqe_compression) ?
drivers/net/ethernet/mellanox/mlx5/core/en/port.c
474
if (!MLX5_CAP_GEN(dev, pcam_reg) || !MLX5_CAP_PCAM_REG(dev, pplm))
drivers/net/ethernet/mellanox/mlx5/core/en/port.c
504
if (!MLX5_CAP_GEN(dev, pcam_reg))
drivers/net/ethernet/mellanox/mlx5/core/en/port.c
563
if (!MLX5_CAP_GEN(dev, pcam_reg))
drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c
217
if (!MLX5_CAP_GEN(mdev, sbcam_reg))
drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c
250
if (!MLX5_CAP_GEN(mdev, sbcam_reg))
drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.h
42
#define MLX5_BUFFER_SUPPORTED(mdev) (MLX5_CAP_GEN(mdev, pcam_reg) && \
drivers/net/ethernet/mellanox/mlx5/core/en/rep/bridge.c
77
*esw_owner_vhca_id = MLX5_CAP_GEN(priv->mdev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/en/rqt.c
190
u32 max_cap_rqt_size = 1 << MLX5_CAP_GEN(mdev, log_max_rqt_size);
drivers/net/ethernet/mellanox/mlx5/core/en/rqt.c
41
if (!MLX5_CAP_GEN(mdev, cross_vhca_rqt))
drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/sample.c
33
if (MLX5_CAP_GEN(mdev, reg_c_preserve) ||
drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/vlan.c
185
if (MLX5_CAP_GEN(esw->dev, prio_tag_required) &&
drivers/net/ethernet/mellanox/mlx5/core/en/tc/int_port.c
34
MLX5_CAP_GEN(esw->dev, reg_c_preserve);
drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_geneve.c
12
return !!(MLX5_CAP_GEN(priv->mdev, flex_parser_protocols) & MLX5_FLEX_PROTO_GENEVE);
drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_geneve.c
160
u8 max_tlv_option_data_len = MLX5_CAP_GEN(priv->mdev, max_geneve_tlv_option_data_len);
drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_geneve.c
161
u8 max_tlv_options = MLX5_CAP_GEN(priv->mdev, max_geneve_tlv_options);
drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_mplsoudp.c
67
!(MLX5_CAP_GEN(priv->mdev, flex_parser_protocols) & MLX5_FLEX_PROTO_CW_MPLS_UDP))
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c
23
if (!MLX5_CAP_GEN(mdev, ipsec_offload))
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c
26
if (!MLX5_CAP_GEN(mdev, log_max_dek))
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.c
99
if (is_kdump_kernel() || !MLX5_CAP_GEN(mdev, tls_rx) || mlx5_get_sd(mdev))
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.h
26
if (!MLX5_CAP_GEN(mdev, tls_tx) && !MLX5_CAP_GEN(mdev, tls_rx))
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.h
29
if (!MLX5_CAP_GEN(mdev, log_max_dek))
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.h
65
return !is_kdump_kernel() && MLX5_CAP_GEN(mdev, tls_tx) &&
drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.h
35
if (!MLX5_CAP_GEN(mdev, psp))
drivers/net/ethernet/mellanox/mlx5/core/en_common.c
106
return MLX5_CAP_GEN(mdev, lag_tx_port_affinity) && mlx5e_get_num_lag_ports(mdev) > 1;
drivers/net/ethernet/mellanox/mlx5/core/en_common.c
285
if (MLX5_CAP_GEN(mdev, tis_tir_td_order))
drivers/net/ethernet/mellanox/mlx5/core/en_common.c
43
bool ro_write = MLX5_CAP_GEN(mdev, relaxed_ordering_write);
drivers/net/ethernet/mellanox/mlx5/core/en_common.c
44
bool ro_read = MLX5_CAP_GEN(mdev, relaxed_ordering_read) ||
drivers/net/ethernet/mellanox/mlx5/core/en_common.c
46
MLX5_CAP_GEN(mdev, relaxed_ordering_read_pci_enabled));
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
107
if (!MLX5_CAP_GEN(priv->mdev, dcbx))
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
1072
if (MLX5_CAP_GEN(mdev, vport_group_manager) && MLX5_CAP_GEN(mdev, qos))
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
1099
if (!MLX5_CAP_GEN(priv->mdev, ets))
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
1132
if (!MLX5_CAP_GEN(priv->mdev, vport_group_manager))
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
1271
if (!MLX5_CAP_GEN(mdev, sbcam_reg))
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
1289
if (!MLX5_CAP_GEN(priv->mdev, qos))
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
1292
if (MLX5_CAP_GEN(priv->mdev, dcbx))
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
132
if (!MLX5_CAP_GEN(priv->mdev, ets))
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
358
if (!MLX5_CAP_GEN(priv->mdev, ets))
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
462
if ((!mode) && MLX5_CAP_GEN(priv->mdev, dcbx)) {
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
494
if (!MLX5_CAP_GEN(priv->mdev, vport_group_manager) ||
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
547
if (!MLX5_CAP_GEN(priv->mdev, vport_group_manager) ||
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
676
if (!MLX5_CAP_GEN(mdev, ets))
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
75
#define MLX5_DSCP_SUPPORTED(mdev) (MLX5_CAP_GEN(mdev, qcam_reg) && \
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
785
if (!MLX5_CAP_GEN(priv->mdev, ets)) {
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
1745
if (!MLX5_CAP_GEN(mdev, vport_group_manager))
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
1777
if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz) ||
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
1807
if (MLX5_CAP_GEN(mdev, wol_g))
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
1810
if (MLX5_CAP_GEN(mdev, wol_s))
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
1813
if (MLX5_CAP_GEN(mdev, wol_a))
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
1816
if (MLX5_CAP_GEN(mdev, wol_b))
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
1819
if (MLX5_CAP_GEN(mdev, wol_m))
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
1822
if (MLX5_CAP_GEN(mdev, wol_u))
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
1825
if (MLX5_CAP_GEN(mdev, wol_p))
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
1999
if (!MLX5_CAP_GEN(mdev, beacon_led))
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
2176
if (enable && !MLX5_CAP_GEN(priv->mdev, cq_period_start_from_cqe))
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
2223
if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
2268
if (!MLX5_CAP_GEN(mdev, cqe_compression))
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
2364
if (!MLX5_CAP_GEN(mdev, ts_cqe_to_dest_cqn) ||
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
625
if (!MLX5_CAP_GEN(priv->mdev, cq_moderation)) {
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
662
if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
773
if (!MLX5_CAP_GEN(mdev, cq_moderation) ||
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
774
!MLX5_CAP_GEN(mdev, cq_period_mode_modify)) {
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
800
!MLX5_CAP_GEN(priv->mdev, cq_period_start_from_cqe)) {
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
893
if (!MLX5_CAP_GEN(mdev, cq_moderation))
drivers/net/ethernet/mellanox/mlx5/core/en_fs.c
182
max_list_size = 1 << MLX5_CAP_GEN(fs->mdev, log_max_vlan_list);
drivers/net/ethernet/mellanox/mlx5/core/en_fs.c
677
1 << MLX5_CAP_GEN(fs->mdev, log_max_current_uc_list) :
drivers/net/ethernet/mellanox/mlx5/core/en_fs.c
678
1 << MLX5_CAP_GEN(fs->mdev, log_max_current_mc_list);
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
110
striding_rq_umr = MLX5_CAP_GEN(mdev, striding_rq) && MLX5_CAP_GEN(mdev, umr_ptr_rlky) &&
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
1436
MLX5_CAP_GEN(mdev, mini_cqe_resp_stride_index))
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
1443
MLX5_CAP_GEN(mdev, enhanced_cqe_compression))
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
2324
if (MLX5_CAP_GEN(mdev, cq_moderation) &&
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
2325
MLX5_CAP_GEN(mdev, cq_period_mode_modify))
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
2752
u16 port_aff_bias = mlx5_core_is_pf(mdev) ? 0 : MLX5_CAP_GEN(mdev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
3452
if (!MLX5_CAP_GEN(priv->mdev, tis_tir_td_order))
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
3501
if (MLX5_CAP_GEN(priv->mdev, tis_tir_td_order))
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
3539
!MLX5_CAP_GEN(mdev, uplink_follow))
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
4339
if (!MLX5_CAP_GEN(mdev, ports_check))
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
442
!MLX5_CAP_GEN(mdev, fixed_buffer_size)) {
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
4815
if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz) ||
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
4897
if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
5387
if (MLX5_CAP_GEN(mdev, cqe_compression) &&
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
5388
MLX5_CAP_GEN(mdev, vport_group_manager))
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
5402
params->rx_dim_enabled = MLX5_CAP_GEN(mdev, cq_moderation) &&
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
5403
MLX5_CAP_GEN(mdev, cq_period_mode_modify);
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
5404
params->tx_dim_enabled = MLX5_CAP_GEN(mdev, cq_moderation) &&
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
5405
MLX5_CAP_GEN(mdev, cq_period_mode_modify);
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
5406
params->rx_moder_use_cqe_mode = !!MLX5_CAP_GEN(mdev, cq_period_start_from_cqe);
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
5432
!MLX5_CAP_GEN(priv->mdev, vport_group_manager)) {
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
6336
if (MLX5_CAP_GEN(mdev, ts_cqe_to_dest_cqn))
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
6475
ptp_txqs = MLX5_CAP_GEN(mdev, ts_cqe_to_dest_cqn) &&
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
84
if (!MLX5_CAP_GEN(mdev, shampo) ||
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
91
if (!MLX5_CAP_GEN(mdev, fixed_buffer_size))
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
128
(MLX5_CAP_GEN(dev, vport_counter_local_loopback) ? \
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
1340
if (MLX5_CAP_GEN(mdev, uplink_follow))
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
1690
u16 i = MLX5_CAP_GEN(peer_esw->dev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
1712
u16 i = MLX5_CAP_GEN(peer_esw->dev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
268
if (MLX5_CAP_GEN(priv->mdev, vport_counter_local_loopback)) {
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
299
if (!MLX5_CAP_GEN(priv->mdev, q_counter_other_vport) ||
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
300
!MLX5_CAP_GEN(priv->mdev, q_counter_aggregation))
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
477
u16 peer_rule_idx = MLX5_CAP_GEN(peer_esw->dev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
833
int max_tir_num = 1 << MLX5_CAP_GEN(mdev, log_max_tir);
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
877
params->rx_dim_enabled = MLX5_CAP_GEN(mdev, cq_moderation);
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
878
params->rx_moder_use_cqe_mode = !!MLX5_CAP_GEN(mdev, cq_period_start_from_cqe);
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
1837
if (!MLX5_CAP_GEN(mdev, sbcam_reg))
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
1848
if (!MLX5_CAP_GEN(mdev, sbcam_reg))
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
1869
if (!MLX5_CAP_GEN(mdev, sbcam_reg))
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
1899
if (!MLX5_CAP_GEN(mdev, sbcam_reg))
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
1915
if (!MLX5_CAP_GEN(mdev, sbcam_reg))
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
1930
if (!MLX5_CAP_GEN(mdev, sbcam_reg))
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
2027
if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
2042
if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
663
(MLX5_CAP_GEN(dev, nic_receive_steering_discard) ? \
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
666
(MLX5_CAP_GEN(dev, vnic_env_int_rq_oob) ? \
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
669
(MLX5_CAP_GEN(dev, eth_wqe_too_small) ? \
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
782
(MLX5_CAP_GEN(dev, vport_counter_local_loopback) ? \
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
880
(MLX5_CAP_GEN(mdev, pcam_reg) ? MLX5_CAP_PCAM_REG(mdev, ppcnt) : 1)
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
1119
if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
1124
peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
1173
MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz),
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
1174
MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
1690
vhca_id = MLX5_CAP_GEN(route_mdev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
3094
if (!(MLX5_CAP_GEN(priv->mdev, flex_parser_protocols) &
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
3110
if (!(MLX5_CAP_GEN(priv->mdev, flex_parser_protocols) &
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
5205
peer_vhca_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eq.c
301
if (!param->mask[0] && MLX5_CAP_GEN(dev, log_max_uctx))
drivers/net/ethernet/mellanox/mlx5/core/eq.c
546
if (MLX5_CAP_GEN(dev, general_notification_event))
drivers/net/ethernet/mellanox/mlx5/core/eq.c
549
if (MLX5_CAP_GEN(dev, port_module_event))
drivers/net/ethernet/mellanox/mlx5/core/eq.c
557
if (MLX5_CAP_GEN(dev, fpga))
drivers/net/ethernet/mellanox/mlx5/core/eq.c
563
if (MLX5_CAP_GEN(dev, temp_warn_event))
drivers/net/ethernet/mellanox/mlx5/core/eq.c
569
if (MLX5_CAP_GEN(dev, max_num_of_monitor_counters))
drivers/net/ethernet/mellanox/mlx5/core/eq.c
591
if (MLX5_CAP_GEN(dev, event_cap))
drivers/net/ethernet/mellanox/mlx5/core/eq.c
684
if (MLX5_CAP_GEN(dev, page_request_disable)) {
drivers/net/ethernet/mellanox/mlx5/core/eq.c
717
if (!MLX5_CAP_GEN(dev, page_request_disable))
drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_ofld.c
125
if (MLX5_CAP_GEN(esw->dev, prio_tag_required)) {
drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_ofld.c
192
!MLX5_CAP_GEN(esw->dev, prio_tag_required))
drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_ofld.c
202
if (MLX5_CAP_GEN(esw->dev, prio_tag_required))
drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_ofld.c
259
fwd_dest.vport.vhca_id = MLX5_CAP_GEN(esw->dev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_ofld.c
77
if (MLX5_CAP_GEN(esw->dev, prio_tag_required)) {
drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_ofld.c
16
return (MLX5_CAP_GEN(esw->dev, prio_tag_required) &&
drivers/net/ethernet/mellanox/mlx5/core/esw/bridge_mcast.c
813
if (!(MLX5_CAP_GEN(esw->dev, flex_parser_protocols) & MLX5_FLEX_PROTO_ICMPV6)) {
drivers/net/ethernet/mellanox/mlx5/core/esw/indir_table.c
234
dest.vport.vhca_id = MLX5_CAP_GEN(esw->dev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec.c
114
if (!MLX5_CAP_GEN(dev, vhca_resource_manager))
drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec.c
15
if (!MLX5_CAP_GEN(dev, vport_group_manager))
drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec.c
87
if (!MLX5_CAP_GEN(dev, vhca_resource_manager))
drivers/net/ethernet/mellanox/mlx5/core/esw/legacy.c
404
if (!MLX5_CAP_GEN(dev, receive_discard_vport_down) &&
drivers/net/ethernet/mellanox/mlx5/core/esw/legacy.c
405
!MLX5_CAP_GEN(dev, transmit_discard_vport_down))
drivers/net/ethernet/mellanox/mlx5/core/esw/legacy.c
414
if (MLX5_CAP_GEN(dev, receive_discard_vport_down))
drivers/net/ethernet/mellanox/mlx5/core/esw/legacy.c
416
if (MLX5_CAP_GEN(dev, transmit_discard_vport_down))
drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
265
if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling))
drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
773
if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling))
drivers/net/ethernet/mellanox/mlx5/core/esw/vporttbl.c
62
key->vhca_id = MLX5_CAP_GEN(esw->dev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
1030
if (MLX5_CAP_GEN(esw->dev, log_max_l2_table))
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
1034
MLX5_CAP_GEN(esw->dev, vport_group_manager)) {
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
1082
bool net_func_v1 = MLX5_CAP_GEN(dev, query_host_net_function_v1);
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
1090
alloc_entries = MLX5_CAP_GEN(dev,
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
1195
if (MLX5_CAP_GEN(dev, query_host_net_function_v1)) {
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
2170
MLX5_CAP_GEN(dev, query_host_net_function_v1))
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
2283
if (!MLX5_CAP_GEN(dev, query_host_net_function_v1))
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
72
if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
724
if (!MLX5_CAP_GEN(dev, log_max_l2_table))
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
802
if (!MLX5_CAP_GEN(esw->dev, vport_group_manager))
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
869
if (vhca_id == MLX5_CAP_GEN(dev, vhca_id))
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
986
MLX5_CAP_GEN(esw->dev, vport_group_manager)) {
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
716
return esw_owner_vhca_id == MLX5_CAP_GEN(esw->dev, vhca_id) ||
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
735
return (MLX5_CAP_GEN(dev, vhca_id) << 16) | vport_num;
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
88
(1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
91
(1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
1011
dest.vport.vhca_id = MLX5_CAP_GEN(rep->esw->dev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
1148
MLX5_CAP_GEN(peer_dev, vhca_id));
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
1161
dest->vport.vhca_id = MLX5_CAP_GEN(peer_dev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
1290
MLX5_CAP_GEN(peer_dev, vhca_id), flows, GFP_KERNEL);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
1339
u16 peer_vhca_id = MLX5_CAP_GEN(peer_dev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
1554
dest.vhca.id = MLX5_CAP_GEN(esw->dev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
165
MLX5_CAP_GEN(src_esw->dev, vhca_id));
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
2304
if (!MLX5_CAP_GEN(dev, vport_group_manager))
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
2981
MLX5_CAP_GEN(master, vhca_id));
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
3004
u16 slave_index = MLX5_CAP_GEN(slave, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
3030
dest.vport.vhca_id = MLX5_CAP_GEN(slave, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
3121
u16 master_vhca = MLX5_CAP_GEN(master, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
3166
u16 master_vhca = MLX5_CAP_GEN(master, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
3258
u16 slave_index = MLX5_CAP_GEN(slave, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
3305
esw_acl_egress_ofld_bounce_rule_destroy(vport, MLX5_CAP_GEN(slave_dev, vhca_id));
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
3425
u16 peer_vhca_id = MLX5_CAP_GEN(peer_esw->dev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
3426
u16 vhca_id = MLX5_CAP_GEN(esw->dev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
3460
peer_esw_i = MLX5_CAP_GEN(peer_esw->dev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
3474
peer_esw_i = MLX5_CAP_GEN(peer_esw->dev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
3475
esw_i = MLX5_CAP_GEN(esw->dev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
430
return MLX5_CAP_GEN(mdev1, vhca_id) == MLX5_CAP_GEN(mdev2, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
478
MLX5_CAP_GEN(esw_attr->dests[attr_idx].mdev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
5117
if (!MLX5_CAP_GEN(esw->dev, migration)) {
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
5122
if (!MLX5_CAP_GEN(esw->dev, vport_group_manager)) {
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
5144
if (!MLX5_CAP_GEN(esw->dev, migration)) {
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
5149
if (!MLX5_CAP_GEN(esw->dev, vhca_resource_manager)) {
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
5199
if (!MLX5_CAP_GEN(esw->dev, vport_group_manager)) {
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
5222
if (!MLX5_CAP_GEN(esw->dev, vhca_resource_manager)) {
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
536
return MLX5_CAP_GEN(esw->dev, reg_c_preserve) &&
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
5530
if (!MLX5_CAP_GEN(esw->dev, vport_group_manager)) {
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
5580
if (!MLX5_CAP_GEN(esw->dev, vhca_resource_manager)) {
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
985
MLX5_CAP_GEN(from_esw->dev, vhca_id));
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
999
dest.vport.vhca_id = MLX5_CAP_GEN(rep->esw->dev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c
572
if (MLX5_CAP_GEN(mdev, cqe_version) == 1)
drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c
702
MLX5_SET(qpc, qpc, log_msg_max, (u8)MLX5_CAP_GEN(mdev, log_max_msg));
drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c
257
if (!MLX5_CAP_GEN(mdev, fpga)) {
drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c
1190
if (silent_mode && !MLX5_CAP_GEN(dev, silent_mode_set))
drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c
1227
if (!MLX5_CAP_GEN(dev, silent_mode_query))
drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c
183
MLX5_CAP_GEN(master, vhca_id));
drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c
219
if ((MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_IB) &&
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
3889
if ((((MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH) &&
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
3890
(MLX5_CAP_GEN(dev, nic_flow_table))) ||
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
3891
((MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_IB) &&
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
3892
MLX5_CAP_GEN(dev, ipoib_enhanced_offloads))) &&
drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c
268
if (aging && MLX5_CAP_GEN(dev, flow_counter_bulk_alloc) != 0) {
drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c
460
alloc_bitmask = MLX5_CAP_GEN(dev, flow_counter_bulk_alloc);
drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c
68
(1 << MLX5_CAP_GEN(dev, log_max_flow_counter_bulk)));
drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c
74
(1 << MLX5_CAP_GEN(dev, log_max_flow_counter_bulk)));
drivers/net/ethernet/mellanox/mlx5/core/fw.c
150
if (MLX5_CAP_GEN(dev, port_selection_cap)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
156
if (MLX5_CAP_GEN(dev, hca_cap_2)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
162
if (MLX5_CAP_GEN(dev, eth_net_offloads)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
169
if (MLX5_CAP_GEN(dev, ipoib_enhanced_offloads)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
176
if (MLX5_CAP_GEN(dev, pg)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
182
if (MLX5_CAP_GEN(dev, atomic)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
188
if (MLX5_CAP_GEN(dev, roce)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
194
if (MLX5_CAP_GEN(dev, nic_flow_table) ||
drivers/net/ethernet/mellanox/mlx5/core/fw.c
195
MLX5_CAP_GEN(dev, ipoib_enhanced_offloads)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
212
if (MLX5_CAP_GEN(dev, qos)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
218
if (MLX5_CAP_GEN(dev, debug))
drivers/net/ethernet/mellanox/mlx5/core/fw.c
221
if (MLX5_CAP_GEN(dev, pcam_reg))
drivers/net/ethernet/mellanox/mlx5/core/fw.c
224
if (MLX5_CAP_GEN(dev, mcam_reg)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
230
if (MLX5_CAP_GEN(dev, qcam_reg))
drivers/net/ethernet/mellanox/mlx5/core/fw.c
233
if (MLX5_CAP_GEN(dev, device_memory)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
239
if (MLX5_CAP_GEN(dev, event_cap)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
245
if (MLX5_CAP_GEN(dev, tls_tx) || MLX5_CAP_GEN(dev, tls_rx)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
258
if (MLX5_CAP_GEN(dev, tlp_device_emulation_manager)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
264
if (MLX5_CAP_GEN(dev, ipsec_offload)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
270
if (MLX5_CAP_GEN(dev, crypto)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
283
if (MLX5_CAP_GEN(dev, adv_virtualization)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
290
if (MLX5_CAP_GEN(dev, shampo)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
296
if (MLX5_CAP_GEN(dev, adv_rdma)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
303
if (MLX5_CAP_GEN(dev, psp)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
319
if (MLX5_CAP_GEN(dev, sw_owner_id)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
347
if (!MLX5_CAP_GEN(dev, force_teardown)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
376
if (!MLX5_CAP_GEN(dev, fast_teardown)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
562
if (!MLX5_CAP_GEN(dev, mcam_reg) || !MLX5_CAP_MCAM_REG(dev, mcqi)) {
drivers/net/ethernet/mellanox/mlx5/core/fw.c
738
if (!MLX5_CAP_GEN(dev, mcam_reg) ||
drivers/net/ethernet/mellanox/mlx5/core/fw.c
842
if (!MLX5_CAP_GEN(dev, mcam_reg) || !MLX5_CAP_MCAM_REG(dev, mcqi) ||
drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c
145
if (!MLX5_CAP_GEN(dev, pcie_reset_using_hotreset_method)) {
drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c
449
if (!MLX5_CAP_GEN(dev, fast_teardown)) {
drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c
602
if (!MLX5_CAP_GEN(dev, pcie_reset_using_hotreset_method))
drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c
830
if (MLX5_CAP_GEN(dev, pci_sync_for_fw_update_with_driver_unload))
drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c
301
if (MLX5_CAP_GEN(priv->mdev, mkey_by_name)) {
drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c
734
if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_IB)
drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c
737
if (!MLX5_CAP_GEN(mdev, ipoib_enhanced_offloads)) {
drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c
359
ldev->ports = MLX5_CAP_GEN(dev, num_lag_ports);
drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h
271
if (!MLX5_CAP_GEN(dev, vport_group_manager) ||
drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h
272
!MLX5_CAP_GEN(dev, lag_master) ||
drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h
273
MLX5_CAP_GEN(dev, num_lag_ports) < 2 ||
drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h
275
MLX5_CAP_GEN(dev, num_lag_ports) > MLX5_MAX_PORTS)
drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c
128
!MLX5_CAP_GEN(dev0, create_lag_when_not_master_up) ||
drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c
605
MLX5_CAP_GEN(mlx5_lag_pf_by_dev_idx(ldev, ports[idx] - 1)->dev,
drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c
91
MLX5_CAP_GEN(mlx5_lag_pf_by_dev_idx(ldev, affinity - 1)->dev,
drivers/net/ethernet/mellanox/mlx5/core/lag/shared_fdb.c
29
MLX5_CAP_GEN(dev, lag_native_fdb_selection) &&
drivers/net/ethernet/mellanox/mlx5/core/lib/aso.c
133
if (MLX5_CAP_GEN(mdev, cqe_128_always) && cache_line_size() >= 128)
drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
1217
dev_freq = MLX5_CAP_GEN(mdev, device_frequency_khz);
drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
1335
expose_cycles = !MLX5_CAP_GEN(mdev, disciplined_fr_counter) ||
drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
1550
if (!MLX5_CAP_GEN(mdev, device_frequency_khz))
drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
1577
if (!MLX5_CAP_GEN(mdev, device_frequency_khz))
drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
1612
if (!MLX5_CAP_GEN(mdev, device_frequency_khz)) {
drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
1645
if (!MLX5_CAP_GEN(mdev, device_frequency_khz))
drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h
66
u8 rq_ts_format_cap = MLX5_CAP_GEN(mdev, rq_ts_format);
drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h
75
u8 sq_ts_format_cap = MLX5_CAP_GEN(mdev, sq_ts_format);
drivers/net/ethernet/mellanox/mlx5/core/lib/gid.c
130
if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
drivers/net/ethernet/mellanox/mlx5/core/lib/gid.c
145
if (MLX5_CAP_GEN(dev, num_vhca_ports) > 0)
drivers/net/ethernet/mellanox/mlx5/core/lib/ipsec_fs_roce.c
120
MLX5_CAP_GEN(ibv_allowed, ft_alias_sw_vhca_id)) {
drivers/net/ethernet/mellanox/mlx5/core/lib/ipsec_fs_roce.c
124
vhca_id_to_be_accessed = MLX5_CAP_GEN(ibv_owner, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/lib/ipsec_fs_roce.c
262
MLX5_CAP_GEN(mdev, native_port_num));
drivers/net/ethernet/mellanox/mlx5/core/lib/ipsec_fs_roce.c
90
u16 vhca_id_to_be_accessed = MLX5_CAP_GEN(ibv_owner, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.c
100
int l2table_size = 1 << MLX5_CAP_GEN(dev, log_max_l2_table);
drivers/net/ethernet/mellanox/mlx5/core/lib/port_tun.c
27
if (!MLX5_CAP_GEN(mdev, ports_check))
drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c
184
return (u32)((MLX5_CAP_GEN(dev, native_port_num) << 8) | sd_group);
drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c
194
if (!MLX5_CAP_GEN(dev, eswitch_manager))
drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c
196
if (!MLX5_CAP_GEN(dev, silent_mode_set) &&
drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c
197
!MLX5_CAP_GEN(dev, silent_mode_query))
drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c
201
if (!MLX5_CAP_GEN(dev, cross_vhca_rqt))
drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c
551
if (MLX5_CAP_GEN(dev, silent_mode_query)) {
drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c
645
u16 vhca_id_to_be_accessed = MLX5_CAP_GEN(primary, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c
748
MLX5_CAP_GEN(primary, vhca_id));
drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c
752
MLX5_CAP_GEN(pos, vhca_id));
drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c
764
MLX5_CAP_GEN(dev, vhca_id));
drivers/net/ethernet/mellanox/mlx5/core/lib/sf.h
11
return MLX5_CAP_GEN(dev, sf_base_id);
drivers/net/ethernet/mellanox/mlx5/core/lib/sf.h
18
return MLX5_CAP_GEN(dev, sf);
drivers/net/ethernet/mellanox/mlx5/core/lib/sf.h
25
if (MLX5_CAP_GEN(dev, max_num_sf))
drivers/net/ethernet/mellanox/mlx5/core/lib/sf.h
26
return MLX5_CAP_GEN(dev, max_num_sf);
drivers/net/ethernet/mellanox/mlx5/core/lib/sf.h
28
return 1 << MLX5_CAP_GEN(dev, log_max_sf);
drivers/net/ethernet/mellanox/mlx5/core/lib/st.c
34
if (!MLX5_CAP_GEN(dev, mkey_pcie_tph))
drivers/net/ethernet/mellanox/mlx5/core/main.c
1609
if (MLX5_CAP_GEN(dev, eth_net_offloads)) {
drivers/net/ethernet/mellanox/mlx5/core/main.c
1616
if (MLX5_CAP_GEN(dev, nic_flow_table) ||
drivers/net/ethernet/mellanox/mlx5/core/main.c
1617
MLX5_CAP_GEN(dev, ipoib_enhanced_offloads)) {
drivers/net/ethernet/mellanox/mlx5/core/main.c
165
if (!MLX5_CAP_GEN(dev, driver_version))
drivers/net/ethernet/mellanox/mlx5/core/main.c
2145
fast_teardown = MLX5_CAP_GEN(dev, fast_teardown);
drivers/net/ethernet/mellanox/mlx5/core/main.c
2146
force_teardown = MLX5_CAP_GEN(dev, force_teardown);
drivers/net/ethernet/mellanox/mlx5/core/main.c
372
if (!MLX5_CAP_GEN(dev, atomic))
drivers/net/ethernet/mellanox/mlx5/core/main.c
402
!MLX5_CAP_GEN(dev, pg))
drivers/net/ethernet/mellanox/mlx5/core/main.c
486
return MLX5_CAP_GEN(dev, roce);
drivers/net/ethernet/mellanox/mlx5/core/main.c
542
mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size)),
drivers/net/ethernet/mellanox/mlx5/core/main.c
611
if (MLX5_CAP_GEN(dev, roce_rw_supported) && MLX5_CAP_GEN_MAX(dev, roce))
drivers/net/ethernet/mellanox/mlx5/core/main.c
646
return (MLX5_CAP_GEN(dev, roce_rw_supported) && !mlx5_is_roce_on(dev)) ||
drivers/net/ethernet/mellanox/mlx5/core/main.c
647
(!MLX5_CAP_GEN(dev, roce_rw_supported) && !MLX5_CAP_GEN(dev, roce));
drivers/net/ethernet/mellanox/mlx5/core/main.c
684
if (!MLX5_CAP_GEN(dev, port_selection_cap))
drivers/net/ethernet/mellanox/mlx5/core/main.c
783
if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_ETH)
drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h
389
#define MLX5_PPS_CAP(mdev) (MLX5_CAP_GEN((mdev), pps) && \
drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h
390
MLX5_CAP_GEN((mdev), pps_modify) && \
drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h
515
if (MLX5_CAP_GEN(dev, max_num_eqs))
drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h
516
return MLX5_CAP_GEN(dev, max_num_eqs);
drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h
518
return 1 << MLX5_CAP_GEN(dev, log_max_eq);
drivers/net/ethernet/mellanox/mlx5/core/mr.c
133
if (!MLX5_CAP_GEN(dev, terminate_scatter_list_mkey))
drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c
241
MLX5_CAP_GEN(dev, vhca_id));
drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c
741
vhca_id_key = MLX5_CAP_GEN(dev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
100
if (!MLX5_CAP_GEN(dev, vport_group_manager) || !mlx5_core_is_pf(dev))
drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
103
min_msix = MLX5_CAP_GEN(dev, min_dynamic_vf_msix_table_size);
drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
104
max_msix = MLX5_CAP_GEN(dev, max_dynamic_vf_msix_table_size);
drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
69
min_msix = MLX5_CAP_GEN(dev, min_dynamic_vf_msix_table_size);
drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
70
max_msix = MLX5_CAP_GEN(dev, max_dynamic_vf_msix_table_size);
drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
750
pcif_vec = MLX5_CAP_GEN(dev, num_ports) * num_online_cpus() + 1;
drivers/net/ethernet/mellanox/mlx5/core/port.c
615
u8 num_tc = MLX5_CAP_GEN(mdev, max_tc) ? : 8;
drivers/net/ethernet/mellanox/mlx5/core/port.c
689
if (!MLX5_CAP_GEN(mdev, ets))
drivers/net/ethernet/mellanox/mlx5/core/port.c
701
if (!MLX5_CAP_GEN(mdev, ets))
drivers/net/ethernet/mellanox/mlx5/core/port.c
885
if (!MLX5_CAP_GEN(mdev, ports_check))
drivers/net/ethernet/mellanox/mlx5/core/qos.c
10
if (!MLX5_CAP_GEN(mdev, qos))
drivers/net/ethernet/mellanox/mlx5/core/rdma.c
147
if (!MLX5_CAP_GEN(dev, roce))
drivers/net/ethernet/mellanox/mlx5/core/rl.c
430
if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, packet_pacing)) {
drivers/net/ethernet/mellanox/mlx5/core/rl.c
454
if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, packet_pacing))
drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.c
300
if (MLX5_CAP_GEN(table->dev, eswitch_manager))
drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.c
34
return MLX5_CAP_GEN(dev, sf) && mlx5_vhca_event_supported(dev);
drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.c
346
table->sf_bar_length = 1 << (MLX5_CAP_GEN(dev, log_min_sf_size) + 12);
drivers/net/ethernet/mellanox/mlx5/core/sriov.c
107
if (MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_IB) {
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.c
1207
*gvmi = MLX5_CAP_GEN(mdev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws.h
241
MLX5_CAP_GEN(mdev, wqe_based_flow_table_update_cap);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_action.c
60
return (MLX5_CAP_GEN(dev, steering_format_version) < MLX5_STEERING_FORMAT_CONNECTX_6DX ||
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
105
caps->prio_tag_required = MLX5_CAP_GEN(mdev, prio_tag_required);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
106
caps->eswitch_manager = MLX5_CAP_GEN(mdev, eswitch_manager);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
107
caps->gvmi = MLX5_CAP_GEN(mdev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
108
caps->flex_protocols = MLX5_CAP_GEN(mdev, flex_parser_protocols);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
109
caps->sw_format_ver = MLX5_CAP_GEN(mdev, steering_format_version);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
111
MLX5_CAP_GEN(mdev, fl_rc_qp_when_roce_disabled);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
113
if (MLX5_CAP_GEN(mdev, roce)) {
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
125
caps->isolate_vl_tc = MLX5_CAP_GEN(mdev, isolate_vl_tc_new);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
133
MLX5_CAP_GEN(mdev, log_header_modify_argument_granularity);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
135
MLX5_CAP_GEN(mdev, log_header_modify_argument_max_alloc);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
146
caps->flex_parser_id_icmp_dw0 = MLX5_CAP_GEN(mdev, flex_parser_id_icmp_dw0);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
147
caps->flex_parser_id_icmp_dw1 = MLX5_CAP_GEN(mdev, flex_parser_id_icmp_dw1);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
152
MLX5_CAP_GEN(mdev, flex_parser_id_icmpv6_dw0);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
154
MLX5_CAP_GEN(mdev, flex_parser_id_icmpv6_dw1);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
159
MLX5_CAP_GEN(mdev, flex_parser_id_geneve_tlv_option_0);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
163
MLX5_CAP_GEN(mdev, flex_parser_id_outer_first_mpls_over_gre);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
167
MLX5_CAP_GEN(mdev, flex_parser_id_outer_first_mpls_over_udp_label);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
171
MLX5_CAP_GEN(mdev, flex_parser_id_gtpu_dw_0);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
175
MLX5_CAP_GEN(mdev, flex_parser_id_gtpu_teid);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
179
MLX5_CAP_GEN(mdev, flex_parser_id_gtpu_dw_2);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
183
MLX5_CAP_GEN(mdev, flex_parser_id_gtpu_first_ext_dw_0);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c
42
*gvmi = MLX5_CAP_GEN(mdev, vhca_id);
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_domain.c
397
if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) {
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_send.c
322
if (MLX5_CAP_GEN(mdev, cqe_version) == 1)
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v0.c
468
if (MLX5_CAP_GEN(dmn->mdev, prio_tag_required))
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_types.h
1575
return (MLX5_CAP_GEN(dev, steering_format_version) >=
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.c
822
MLX5_CAP_GEN(ns->dev, steering_format_version) == MLX5_STEERING_FORMAT_CONNECTX_5)
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5dr.h
157
return MLX5_CAP_GEN(dev, roce) &&
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5dr.h
160
(MLX5_CAP_GEN(dev, steering_format_version) <=
drivers/net/ethernet/mellanox/mlx5/core/transobj.c
399
MLX5_CAP_GEN(hp->func_mdev, vhca_id), hp->rqn[i]);
drivers/net/ethernet/mellanox/mlx5/core/transobj.c
408
MLX5_CAP_GEN(hp->peer_mdev, vhca_id), hp->sqn[i]);
drivers/net/ethernet/mellanox/mlx5/core/uar.c
201
(1 << MLX5_CAP_GEN(mdev, log_bf_reg_size)) + MLX5_BF_OFFSET;
drivers/net/ethernet/mellanox/mlx5/core/uar.c
281
bf_reg_size = 1 << MLX5_CAP_GEN(dev, log_bf_reg_size);
drivers/net/ethernet/mellanox/mlx5/core/uar.c
63
if (MLX5_CAP_GEN(mdev, uar_4k))
drivers/net/ethernet/mellanox/mlx5/core/uar.c
64
return MLX5_CAP_GEN(mdev, num_of_uars_per_page);
drivers/net/ethernet/mellanox/mlx5/core/uar.c
73
if (MLX5_CAP_GEN(mdev, uar_4k))
drivers/net/ethernet/mellanox/mlx5/core/vport.c
1110
is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
drivers/net/ethernet/mellanox/mlx5/core/vport.c
1128
if (MLX5_CAP_GEN(dev, num_ports) == 2)
drivers/net/ethernet/mellanox/mlx5/core/vport.c
1175
is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
drivers/net/ethernet/mellanox/mlx5/core/vport.c
1191
if (MLX5_CAP_GEN(dev, num_ports) > 1)
drivers/net/ethernet/mellanox/mlx5/core/vport.c
1238
MLX5_CAP_GEN(master_mdev, vhca_id));
drivers/net/ethernet/mellanox/mlx5/core/vport.c
1242
MLX5_CAP_GEN(port_mdev, affiliate_nic_vport_criteria));
drivers/net/ethernet/mellanox/mlx5/core/vport.c
1285
int port_type_cap = MLX5_CAP_GEN(mdev, port_type);
drivers/net/ethernet/mellanox/mlx5/core/vport.c
335
1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) :
drivers/net/ethernet/mellanox/mlx5/core/vport.c
336
1 << MLX5_CAP_GEN(dev, log_max_current_mc_list);
drivers/net/ethernet/mellanox/mlx5/core/vport.c
440
1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) :
drivers/net/ethernet/mellanox/mlx5/core/vport.c
441
1 << MLX5_CAP_GEN(dev, log_max_current_mc_list);
drivers/net/ethernet/mellanox/mlx5/core/vport.c
491
max_list_size = 1 << MLX5_CAP_GEN(dev, log_max_vlan_list);
drivers/net/ethernet/mellanox/mlx5/core/vport.c
606
if (!MLX5_CAP_GEN(mdev, vport_group_manager))
drivers/net/ethernet/mellanox/mlx5/core/vport.c
669
is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
drivers/net/ethernet/mellanox/mlx5/core/vport.c
670
tbsz = mlx5_get_gid_table_len(MLX5_CAP_GEN(dev, gid_table_size));
drivers/net/ethernet/mellanox/mlx5/core/vport.c
703
if (MLX5_CAP_GEN(dev, num_ports) == 2)
drivers/net/ethernet/mellanox/mlx5/core/vport.c
736
is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
drivers/net/ethernet/mellanox/mlx5/core/vport.c
738
tbsz = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size));
drivers/net/ethernet/mellanox/mlx5/core/vport.c
768
if (MLX5_CAP_GEN(dev, num_ports) == 2)
drivers/net/ethernet/mellanox/mlx5/core/vport.c
798
is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
drivers/net/ethernet/mellanox/mlx5/core/vport.c
816
if (MLX5_CAP_GEN(dev, num_ports) == 2)
drivers/net/ethernet/mellanox/mlx5/core/vport.c
976
if (!MLX5_CAP_GEN(mdev, disable_local_lb_mc) &&
drivers/net/ethernet/mellanox/mlx5/core/vport.c
977
!MLX5_CAP_GEN(mdev, disable_local_lb_uc))
drivers/net/ethernet/mellanox/mlx5/core/vport.c
989
if (MLX5_CAP_GEN(mdev, disable_local_lb_mc))
drivers/net/ethernet/mellanox/mlx5/core/vport.c
993
if (MLX5_CAP_GEN(mdev, disable_local_lb_uc))
drivers/net/ethernet/mellanox/mlx5/core/wc.c
126
if (MLX5_CAP_GEN(mdev, cqe_128_always) && cache_line_size() >= 128)
drivers/net/ethernet/mellanox/mlx5/core/wc.c
288
int buf_size = (1 << MLX5_CAP_GEN(sq->cq.mdev, log_bf_reg_size)) / 2;
drivers/net/ethernet/mellanox/mlx5/core/wc.c
414
if (!MLX5_CAP_GEN(mdev, bf)) {
drivers/net/ethernet/mellanox/mlx5/core/wc.c
419
if (!MLX5_CAP_GEN(mdev, log_max_sq)) {
drivers/vdpa/mlx5/core/mr.c
878
if (asid == 0 && MLX5_CAP_GEN(mvdev->mdev, umem_uid_0)) {
drivers/vdpa/mlx5/core/resources.c
58
if (MLX5_CAP_GEN(mvdev->mdev, umem_uid_0))
drivers/vdpa/mlx5/core/resources.c
62
if (!MLX5_CAP_GEN(mvdev->mdev, log_max_uctx))
drivers/vdpa/mlx5/net/mlx5_vnet.c
3300
MLX5_CAP_GEN(mvdev->mdev, umem_uid_0)) {
drivers/vdpa/mlx5/net/mlx5_vnet.c
3478
if (MLX5_CAP_GEN(mvdev->mdev, log_min_sf_size) + 12 < PAGE_SHIFT)
drivers/vdpa/mlx5/net/mlx5_vnet.c
3875
1 << MLX5_CAP_GEN(mdev, log_max_rqt_size));
drivers/vdpa/mlx5/net/mlx5_vnet.c
3987
if (MLX5_CAP_GEN(mvdev->mdev, umem_uid_0)) {
drivers/vfio/pci/mlx5/cmd.c
1291
if (MLX5_CAP_GEN(mdev, cqe_version) == 1)
drivers/vfio/pci/mlx5/cmd.c
1379
MLX5_SET(qpc, qpc, log_msg_max, MLX5_CAP_GEN(mdev, log_max_msg));
drivers/vfio/pci/mlx5/cmd.c
237
if (!MLX5_CAP_GEN(mvdev->mdev, migration))
drivers/vfio/pci/mlx5/cmd.c
278
if (MLX5_CAP_GEN(mvdev->mdev, adv_virtualization))
include/linux/mlx5/driver.h
1242
return dev->caps.embedded_cpu && MLX5_CAP_GEN(dev, eswitch_manager);
include/linux/mlx5/driver.h
1262
return MLX5_CAP_GEN(dev, vport_group_manager) &&
include/linux/mlx5/driver.h
1263
(MLX5_CAP_GEN(dev, num_lag_ports) > 1) &&
include/linux/mlx5/driver.h
1264
MLX5_CAP_GEN(dev, lag_master);
include/linux/mlx5/driver.h
1289
return MLX5_CAP_GEN(dev, affiliate_nic_vport_criteria) &&
include/linux/mlx5/driver.h
1309
return MLX5_CAP_GEN(dev, native_port_num);
include/linux/mlx5/driver.h
1314
int idx = MLX5_CAP_GEN(dev, native_port_num);
include/linux/mlx5/driver.h
1330
if (MLX5_CAP_GEN(dev, roce_rw_supported))
include/linux/mlx5/driver.h
1331
return MLX5_CAP_GEN(dev, roce);
include/linux/mlx5/driver.h
1346
if (!MLX5_CAP_GEN(mdev, log_max_dek))
include/linux/mlx5/eswitch.h
13
#define MLX5_ESWITCH_MANAGER(mdev) MLX5_CAP_GEN(mdev, eswitch_manager)
include/linux/mlx5/qp.h
583
MLX5_CAP_GEN(dev, sq_ts_format);
include/linux/mlx5/vport.h
40
(MLX5_CAP_GEN(mdev, vport_group_manager) && \
include/linux/mlx5/vport.h
41
(MLX5_CAP_GEN(mdev, port_type) == MLX5_CAP_PORT_TYPE_ETH) && \