MLX5_CAP_ESW
int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size);
if (sizeof(attr->eth) > MLX5_CAP_ESW(priv->mdev, max_encap_header_size)) {
return !!MLX5_CAP_ESW(priv->mdev, nvgre_encap_decap);
return !!MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap);
return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) &&
if (MLX5_CAP_ESW(esw->dev, counter_eswitch_affinity) ==
else if (!MLX5_CAP_ESW(esw->dev, vport_cvlan_insert_always))
if (!MLX5_CAP_ESW(br_offloads->esw->dev, merged_eswitch))
if (MLX5_CAP_ESW(bridge->br_offloads->esw->dev, merged_eswitch)) {
if (MLX5_CAP_ESW(bridge->br_offloads->esw->dev, merged_eswitch)) {
if (MLX5_CAP_ESW(bridge->br_offloads->esw->dev, merged_eswitch)) {
if (!MLX5_CAP_ESW(dev, vport_cvlan_strip) ||
!MLX5_CAP_ESW(dev, vport_cvlan_insert_if_not_exist))
if (MLX5_CAP_ESW(dev, vport_cvlan_insert_always)) {
if (!MLX5_CAP_ESW(esw->dev, esw_vport_state_max_tx_speed))
if (MLX5_CAP_ESW(esw->dev, merged_eswitch))
if (MLX5_CAP_ESW(esw->dev, merged_eswitch))
MLX5_CAP_ESW(esw->dev, merged_eswitch)) {
if (!MLX5_CAP_ESW(esw->dev, merged_eswitch))
if (MLX5_CAP_ESW(esw->dev, merged_eswitch))
if (MLX5_CAP_ESW(esw->dev, merged_eswitch))
if (!MLX5_CAP_ESW(esw->dev, merged_eswitch))
if (!MLX5_CAP_ESW(esw->dev, esw_uplink_ingress_acl))
if (MLX5_CAP_ESW(esw->dev, merged_eswitch)) {
if (MLX5_CAP_ESW(on_esw->dev, merged_eswitch))
if (MLX5_CAP_ESW(on_esw->dev, merged_eswitch))
MLX5_CAP_ESW(dev, log_max_fdb_encap_uplink);
max_encap_size = MLX5_CAP_ESW(dev, max_encap_header_size);
if (!MLX5_CAP_ESW(mdev, esw_vport_state_max_tx_speed))
MLX5_CAP_ESW(dev, root_ft_on_other_esw) &&
MLX5_CAP_ESW(dev0, esw_shared_ingress_acl))
int fw_log_max_fdb_encap_uplink = MLX5_CAP_ESW(dev, log_max_fdb_encap_uplink);
return mlx5_core_is_pf(dev) && MLX5_CAP_ESW(dev, ecpf_vport_exists);